Presentation title
Design of Energy/Quality Scalable Hardware by Runtime Voltage Scaling and Back BiasingAuthors
Daniele Jahier Pagliari, Enrico Macii and Massimo PoncinoInstitution(s)
Politecnico di TorinoPresentation type
Technical presentationAbstract
Embedded systems for IoT must balance increasing processing demands with limited energy budgets. One way to achieve this twofold objective is exploiting the inherent error tolerance of many IoT applications, such as sensing and recognition. Error tolerance permits the relaxation of computational accuracy constraints, in a context-dependent manner. To obtain the desired energy benefits from reduced accuracy computation, hardware operators must be designed to support energy/quality scalability at runtime. However, previous implementations of such kind of operators, which are based on architectural modifications, are mostly design-specific and tend to have large overheads at maximum precision, compared to standard designs.
We describe a new methodology for the design of energy/quality scalable operators that reduces these overheads by introducing minimal architectural changes, and leveraging technological knobs (supply voltage and threshold voltage scaling) instead. Moreover, our method is fully automatic and design-independent. We demonstrate it on 28nm FDSOI technology, exploiting the strong effect of back biasing on threshold voltage scaling. Results show a power consumption reduction of as much as 39% at iso-accuracy, compared to solutions based only on supply voltage scaling.
Additional material
- Presentation slides: [pdf]
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