Workshop Programme


IWES 2017

Workshop Programme

Thursday 7 September 2017
Where Centro Congressi, via Salaria 113, Roma
09:00 Registration
09:30 Welcome
  Presentation of research groups from scientific institutions
09:40 Anna Bernasconi, Valentina Ciriani, Enrico Tronci, Gabriella Trucco and Tiziano Villa
University of Pisa, University of Milan, Sapienza University of Rome and Verona University
An Italian Research Group on Logic Synthesis (Switching Logic Meets Old and New Problems)
09:50 Vincenzo Bonifaci, Gianlorenzo D'Angelo and Alberto Marchetti-Spaccamela
IASI-CNR, Gran Sasso Science Institute (GSSI) and Sapienza University of Rome
Scheduling algorithms for extensions of the sporadic task model
10:00 Vittoriano Muttillo, Vincenzo Stoico, Giuseppe Marini and Luigi Pomante
University of L'Aquila
Research Group Introduction
10:10 Paolo Burgio and Marko Bertogna
University of Modena
The High-Performance Real-Time Lab
10:20 Enrico Tronci, Toni Mancini, Federico Mari, Annalisa Massini, Igor Melatti, Ivano Salvo
Sapienza University of Rome
Introduction to MCLab – the Model Checking Lab
10:30 Davide Bertozzi and Michele Favalli
University of Ferrara
An Interconnect-centric Approach to Propel the Next Generation of Embedded Systems
10:40 Paolo Meloni, Carlo Sau and Luigi Raffo
University of Cagliari
Low Power and Customized Embedded and Cyber-Physical Systems
10:50 Coffee break
11:20 Tiziano Villa
University of Verona
Electronic Systems Design at the Department of Computer Science University of Verona: updates from 2016
11:30 Roberto Giorgi
University of Siena
Research Group Overview
11:40 Andrea Bartolini and Luca Benini
University of Bologna
Thermal and Power management of Embedded High-Performance Computing
11:50 Giorgio Buttazzo and Marco Di Natale
Sant'Anna School of Advanced Studies
Introduction to the ReTiS Lab
12:00 Federico Aromolo, Cosimo Antonio Prete, Pierfrancesco Foglia and Gabriele Antonio De Vitis
University of Pisa
A Model-Based Monitoring Approach for Safety-Critical Cyber-Physical Systems
12:10 Ivan Cibrario Bertolotti
IEIIT - National Research Council
Computer Engineering and Networks Group - An Introduction
12:20 Flora Amato, Valentina Casola, Alessandro Cilardo, Antonino Mazzeo, Nicola Mazzocca, Valeria Vittorini and Mario Barbareschi
University of Naples
Research Activities of Embedded Group Laboratory
12:30 Gabriele Antonio De Vitis, Cosimo Antonio Prete and Pierfrancesco Foglia
University of Pisa
An inspection system for pharmaceutical glass tubes
12:40 Giuseppe Airò Farulla, Paolo Prinetto and Antonio Varriale
Politecnico di Torino, Blu5 Labs Ltd
An Introduction to SEcube™: A HW/SW Cybersecurity Platform
12:50 Lunch
 
  Industrial Session
14:20 William Fornaciari, Carlo Brandolese and Matteo Grotto
IBT Systems
A company working on the Intelligence Behind Things
14:35 Paolo Gai
Evidence Srl
Company Presentation and latest product developments
14:50 Alberto Ferrari
ALES
The Italian branch of the United Technology Research Center
15:05 Massimo Verola
CivitaNavi
High performance Embedded GNSS INS (EGI) based on FOG sensors technology for Safety Critical Airborne applications
15:20 Coffee break
15:50 Silvia Mazzini
Intecs SpA
Company presentation
16:05 David Perillo
Elettronica SpA
Company presentation
16:20 Simona Agostinelli and Davide Catani
Seco s.r.l.
Company presentation
16:35 Pierino Ghelfi
Leonardo – Divisione SSI
Panoramica sui Sistemi Embedded impiegati da Leonardo nella Divisione Sistemi per la Sicurezza delle Informazioni
16:50 Question time
 
17:20 Short break
17:35 Business meeting
   
20:30 Social Dinner
Friday 8 September 2017
Where Centro Congressi, via Salaria 113, Roma Aula Alfa, via Salaria 113, Roma
10:00 Discussion: Ranking of journals on Embedded Systems
10:45 Coffee Break
  Network, Sensors & IoT Resource Management
11:15 Giuseppe Airò Farulla and Paolo Prinetto
Improving the accessibility of IoT platforms: Two study cases
Francesca Palumbo, Rubattu Claudio, Carlo Sau, Tiziana Fanni, Paolo Meloni and Luigi Raffo
Dynamic Trade-Off Management for CPS
11:35 Carmelo Di Franco, Mauro Marinoni and Giorgio Buttazzo
Accurate RSSI Localization in Dynamic Unknown Environments
Alessandro Biondi and Marco Di Natale
Multicore implementations of the Logical Execution Time paradigm
11:55 Francesco Conti, Davide Rossi and Luca Benini
Flexible and Scalable Acceleration Techniques for Low-Power Edge Computing
Mauro Marinoni, Alessandro Biondi, Marco Pagani and Giorgio Buttazzo
FRED: A Framework for Supporting Real-Time Applications on Dynamic Reconfigurable FPGAs
12:15 Daniele Jahier Pagliari, Enrico Macii and Massimo Poncino
Design of Energy/Quality Scalable Hardware by Runtime Voltage Scaling and Back Biasing
Paolo Burgio and Marko Bertogna
The importance of memory in the next generation of real-time systems
12:35 Gianluca Cena, Ivan Cibrario Bertolotti, Tingting Hu and Adriano Valenzano
CAN with eXtensible in-frame Reply: a Survey
Andrea Marongiu and Luca Benini
Towards a Predictable Execution Model for Heterogeneous Systems‐on‐a‐Chip
12:55 Mihai T. Lazarescu and Luciano Lavagno
Tagless Indoor Human Localization and Identification using Capacitive Sensors
William Fornaciari
Thermal analysis and management of multi-core systems
13:15 Lunch
  Simulation & Co-design   Scheduling
14:45 Luigi Pannocchi, Mauro Marinoni and Giorgio Buttazzo
Simulation Framework for Multi-Vehicle Autonomous Systems
  Vincenzo Bonifaci, Gianlorenzo D'Angelo and Alberto Marchetti-Spaccamela
Algorithms for hierarchical and semi-partitioned parallel scheduling
15:05 David Perillo
Using MDA to support software-firmware co-design and co-verification on Virtual Platforms
  Daniel Casini, Alessandro Biondi and Giorgio Buttazzo
Semi-Partitioned Scheduling for Multicore Systems
15:25 Vittoriano Muttillo, Daniele Ciambrone, Vincenzo Stoico, Giacomo Valente and Luigi Pomante
HEPSYCODE-RTMC: a Real-Time and Mixed Criticality Extensions for a System-Level HW/SW Co-Design Methodology
  Giuseppe Tagliavini, Andrea Marongiu and Luca Benini
An Optimized Task-Based Programming Model for Embedded Many-core Computing Platforms
15:45 Paolo Pazzaglia, Marco Di Natale and Giorgio Buttazzo
A Co-Simulation Framework for Engine Control Applications
  Tullio Vardanega
Experience from runtime implementations: scheduling and parallelism
16:05 Vittoriano Muttillo, Vincenzo Stoico, Giacomo Valente, Luigi Pomante and Fausto D'Antonio
CC4CS: A Unifying Statement-Level Performance Metric for HW/SW Technologies
  Toni Mancini, Federico Mari, Annalisa Massini, Igor Melatti, Ivano Salvo and Enrico Tronci
On minimising the maximum expected verification time
16:25 Coffee Break
  Model-based Design, Analysis & Formal Verification   Platforms & Reconfigurable Systems
16:55 Tiziano Villa and Luca Geretti
Formal verification of nonlinear hybrid systems: the release of Ariadne 1.0
  Enrico Rossi and Giorgio Buttazzo
Preemptable Partial Reconfiguration for Real-Time Computing with FPGAs
17:15 Orlando Ferrante and Alberto Ferrari
A methodology for increasing the efficiency and coverage of model checking and its application to Aerospace Systems
  Alessandro Capotondi, Andrea Marongiu and Luca Benini
Enabling low‐cost and lightweight zero‐copy offloading on embedded heterogeneous many‐core accelerators: the PULP experience
17:35 Ivan Cibrario Bertolotti, Tingting Hu and Nicolas Navet
Transparent Fault Tolerance Support in Model-Based Design
  Roberto Giorgi
The AXIOM-board: bringing programmability, acceleration, scalability into a 64-bit hand-size board
17:55 Giacomo Gentile, Alessandro Ulisse, Marco Carloni, Fabio Cremona, Stefano Soffia, Leonardo Mangeruca, Alberto Ferrari and Gilberto Burgio
Modelling and Simulation Tools for Systems Integration on Aircraft
  Giuseppe Marini, Vincenzo Sulli, Fortunato Santucci and Marco Faccio
Efficient FPGA implementation of a Digital Transparent Satellite Processor
18:15 Toni Mancini, Federico Mari, Annalisa Massini, Igor Melatti and Enrico Tronci
Simulation-Based Formal Verification of Onboard Software: a case study
  Matteo Semmoloni and Matteo Bissoli
Progettazione di sistemi con elaborazione embedded: dal  DSP all’architettura ARM
18:35  Closing remarks and end of the workshop