New Trends in Performance Estimation Techniques: Unified Statement-Level Approach for Embedded System Design


Vittoriano Muttillo, Paolo Giammatteo, Luigi Pomante and Vincenzo Stoico

Presentation title

New Trends in Performance Estimation Techniques: Unified Statement-Level Approach for Embedded System Design

Authors

Vittoriano Muttillo, Paolo Giammatteo, Luigi Pomante and Vincenzo Stoico

Institution(s)

University of L'Aquila

Presentation type

Presentation of a research group from one or more scientific institutions

Abstract

In the last thirty years there has been an exponential increase of both the spread and evolution of information technology. In this respect, it is certainly underlined the spiraling of embedded systems. The presence of such devices in everyday life is constant and often almost invisible. Moreover, the adopted design methodology is of critical importance during the development of this kind of system. Unfortunately, these methodologies usually lack generality and can be very onerous and time consuming, especially when working at low levels of abstraction. For this reason, working on a higher abstraction level (i.e., Electronic System-Level, ESL) is needed and execute an early performance estimation is a fundamental step. In such a domain, this presentation will analyze new trends in performance estimation techniques. The purpose is to extract information about the main practice used in the system-level design flow in order to reduce the time needed for the initial activities, reducing also estimation errors without an extensive and deep analysis of the final hardware/software platforms. Several metrics and approaches will be presented, focusing on timing and energy performance analysis. Metrics related to high-level C programming language statements will be exploited, while a framework that helps to calculate this kind of metrics for a given program/function/task will be disclosed. Additionally, this framework is also able to automatically generate large amounts of constrained random inputs and to evaluate statistics on the metric itself. By analyzing the data, it is then possible to validate the metrics with respect to the performance of a target embedded processor recursively. The working process has been defined by looking at the metrics definition. The framework exploits Instruction Set Simulators (ISSs) and simulations permit to calculate the number of clock cycles and assembly instructions needed to execute the program. The number of executed C statements is obtained performing a profiling on the host architecture. These big data are used and analyzed by means of several statistical methods, and useful results encourage the use of this approach inside an ESL design flow. Other static source code analysis will be presented, focusing on construct, operators and data format that can change the performance behavior of a program. Furthermore, in the era of Big Data, the use of Machine Learning (ML) methods in this context can be a valid alternative to the classic methods to estimate metrics for embedded system performance. Thus, we will describe the framework extended to the use of ML, for the calculation of statement-level embedded software performance metrics. Statistical analysis of the distributions of some embedded processors are reported to validate the proposed approach. Meanwhile, a feature importance analysis is performed on the preliminary parameters that characterize each individual processor, both in the HW and SW domain, with the aim of determining which of these parameters is fundamental for the following evaluation of the metrics. The aim is to extrapolate, through the feature importance analysis, a group of preliminary parameters to be exploited by the subsequent ML algorithm that will characterize the performance metrics.


Additional material

  • Extended abstract: [pdf]