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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | A Map-Reduce Parallel Approach to Automatic Synthesis of Control Software | Type | Report | ||
| Year | 2012 | Publication | Abbreviated Journal | ||
| Volume | abs/1210.2276 | Issue | Pages | ||
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| Abstract | Many Control Systems are indeed Software Based Control Systems, i.e. control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of control software.
Available algorithms and tools (e.g., QKS) may require weeks or even months of computation to synthesize control software for large-size systems. This motivates search for parallel algorithms for control software synthesis. In this paper, we present a map-reduce style parallel algorithm for control software synthesis when the controlled system (plant) is modeled as discrete time linear hybrid system. Furthermore we present an MPI-based implementation PQKS of our algorithm. To the best of our knowledge, this is the first parallel approach for control software synthesis. We experimentally show effectiveness of PQKS on two classical control synthesis problems: the inverted pendulum and the multi-input buck DC/DC converter. Experiments show that PQKS efficiency is above 65%. As an example, PQKS requires about 16 hours to complete the synthesis of control software for the pendulum on a cluster with 60 processors, instead of the 25 days needed by the sequential algorithm in QKS. |
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
Call Number  |
Sapienza @ mari @ | Serial | 101 | ||
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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | On Model Based Synthesis of Embedded Control Software | Type | Report | ||
| Year | 2012 | Publication | Abbreviated Journal | ||
| Volume | abs/1207.4474 | Issue | Pages | ||
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| Abstract | Many Embedded Systems are indeed Software Based Control Systems (SBCSs), that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for control software. Given the formal model of a plant as a Discrete Time Linear Hybrid System and the implementation specifications (that is, number of bits in the Analog-to-Digital (AD) conversion) correct-by-construction control software can be automatically generated from System Level Formal Specifications of the closed loop system (that is, safety and liveness requirements), by computing a suitable finite abstraction of the plant.
With respect to given implementation specifications, the automatically generated code implements a time optimal control strategy (in terms of set-up time), has a Worst Case Execution Time linear in the number of AD bits $b$, but unfortunately, its size grows exponentially with respect to $b$. In many embedded systems, there are severe restrictions on the computational resources (such as memory or computational power) available to microcontroller devices. This paper addresses model based synthesis of control software by trading system level non-functional requirements (such us optimal set-up time, ripple) with software non-functional requirements (its footprint). Our experimental results show the effectiveness of our approach: for the inverted pendulum benchmark, by using a quantization schema with 12 bits, the size of the small controller is less than 6% of the size of the time optimal one. |
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number |
Sapienza @ mari @ | Serial | 102 | ||
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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Automatic Control Software Synthesis for Quantized Discrete Time Hybrid Systems | Type | Report | ||
| Year | 2012 | Publication | Abbreviated Journal | ||
| Volume | abs/1207.4098 | Issue | Pages | ||
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| Abstract | Many Embedded Systems are indeed Software Based Control Systems, that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of embedded systems control software. This paper addresses control software synthesis for discrete time nonlinear systems. We present a methodology to overapproximate the dynamics of a discrete time nonlinear hybrid system H by means of a discrete time linear hybrid system L(H), in such a way that controllers for L(H) are guaranteed to be controllers for H. We present experimental results on the inverted pendulum, a challenging and meaningful benchmark in nonlinear Hybrid Systems control. | ||||
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number |
Sapienza @ mari @ | Serial | 103 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | From Boolean Functional Equations to Control Software | Type | Report | ||
| Year | 2011 | Publication | Abbreviated Journal | ||
| Volume | abs/1106.0468 | Issue | Pages | ||
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| Abstract | Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) at most O(nr), being n = |x| the number of arguments of functions in F and r the number of functions in F. | ||||
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number |
Sapienza @ mari @ | Serial | 105 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Quantized Feedback Control Software Synthesis from System Level Formal Specifications for Buck DC/DC Converters | Type | Report | ||
| Year | 2011 | Publication | Abbreviated Journal | ||
| Volume | abs/1105.5640 | Issue | Pages | ||
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| Abstract | Many Embedded Systems are indeed Software Based Control Systems (SBCSs), that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of SBCS control software. In previous works we presented an algorithm, along with a tool QKS implementing it, that from a formal model (as a Discrete Time Linear Hybrid System, DTLHS) of the controlled system (plant), implementation specifications (that is, number of bits in the Analog-to-Digital, AD, conversion) and System Level Formal Specifications (that is, safety and liveness requirements for the closed loop system) returns correct-by-construction control software that has a Worst Case Execution Time (WCET) linear in the number of AD bits and meets the given specifications. In this technical report we present full experimental results on using it to synthesize control software for two versions of buck DC-DC converters (single-input and multi-input), a widely used mixed-mode analog circuit. | ||||
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number |
Sapienza @ mari @ | Serial | 106 | ||
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| Author | Tronci, E.; Mancini, T.; Mari, F.; Melatti, I.; Jacobsen, R. H.; Ebeid, E.; Mikkelsen, S. A.; Prodanovic, M.; Gruber, J. K.; Hayes, B. | ||||
| Title | SmartHG: Energy Demand Aware Open Services for Smart Grid Intelligent Automation | Type | Conference Article | ||
| Year | 2014 | Publication | Proceedings of the Work in Progress Session of SEAA/DSD 2014 | Abbreviated Journal | |
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| ISSN | ISBN | 978-3-902457-40-0 | Medium | ||
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| Notes | Approved | no | |||
| Call Number |
Sapienza @ mari @ | Serial | 119 | ||
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| Author | Mancini, T.; Melatti, I.; Tronci, E. | ||||
| Title | Any-horizon uniform random sampling and enumeration of constrained scenarios for simulation-based formal verification | Type | Journal Article | ||
| Year | 2021 | Publication | IEEE Transactions on Software Engineering | Abbreviated Journal | |
| Volume | Issue | Pages | 1-1 | ||
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| Abstract | Model-based approaches to the verification of non-terminating Cyber-Physical Systems (CPSs) usually rely on numerical simulation of the System Under Verification (SUV) model under input scenarios of possibly varying duration, chosen among those satisfying given constraints. Such constraints typically stem from requirements (or assumptions) on the SUV inputs and its operational environment as well as from the enforcement of additional conditions aiming at, e.g., prioritising the (often extremely long) verification activity, by, e.g., focusing on scenarios explicitly exercising selected requirements, or avoiding </i>vacuity</i> in their satisfaction. In this setting, the possibility to efficiently sample at random (with a known distribution, e.g., uniformly) within, or to efficiently enumerate (possibly in a uniformly random order) scenarios among those satisfying all the given constraints is a key enabler for the practical viability of the verification process, e.g., via simulation-based statistical model checking. Unfortunately, in case of non-trivial combinations of constraints, iterative approaches like Markovian random walks in the space of sequences of inputs in general fail in extracting scenarios according to a given distribution (e.g., uniformly), and can be very inefficient to produce at all scenarios that are both legal (with respect to SUV assumptions) and of interest (with respect to the additional constraints). For example, in our case studies, up to 91% of the scenarios generated using such iterative approaches would need to be neglected. In this article, we show how, given a set of constraints on the input scenarios succinctly defined by multiple finite memory monitors, a data structure (scenario generator) can be synthesised, from which any-horizon scenarios satisfying the input constraints can be efficiently extracted by (possibly uniform) random sampling or (randomised) enumeration. Our approach enables seamless support to virtually all simulation-based approaches to CPS verification, ranging from simple random testing to statistical model checking and formal (i.e., exhaustive) verification, when a suitable bound on the horizon or an iterative horizon enlargement strategy is defined, as in the spirit of bounded model checking. | ||||
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| ISSN | 1939-3520 | ISBN | Medium | ||
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| Notes | To appear | Approved | no | ||
| Call Number |
MCLab @ davi @ ref9527998 | Serial | 191 | ||
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| Author | Melatti, I.; Mari, F.; Mancini, T.; Prodanovic, M.; Tronci, E. | ||||
| Title | A Two-Layer Near-Optimal Strategy for Substation Constraint Management via Home Batteries | Type | Journal Article | ||
| Year | 2021 | Publication | IEEE Transactions on Industrial Electronics | Abbreviated Journal | |
| Volume | Issue | Pages | 1-1 | ||
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| Abstract | Within electrical distribution networks, substation constraints management requires that aggregated power demand from residential users is kept within suitable bounds. Efficiency of substation constraints management can be measured as the reduction of constraints violations w.r.t. unmanaged demand. Home batteries hold the promise of enabling efficient and user-oblivious substation constraints management. Centralized control of home batteries would achieve optimal efficiency. However, it is hardly acceptable by users, since service providers (e.g., utilities or aggregators) would directly control batteries at user premises. Unfortunately, devising efficient hierarchical control strategies, thus overcoming the above problem, is far from easy. We present a novel two-layer control strategy for home batteries that avoids direct control of home devices by the service provider and at the same time yields near-optimal substation constraints management efficiency. Our simulation results on field data from 62 households in Denmark show that the substation constraints management efficiency achieved with our approach is at least 82% of the one obtained with a theoretical optimal centralized strategy. | ||||
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| Notes | To appear | Approved | no | ||
| Call Number |
MCLab @ davi @ ref9513535 | Serial | 190 | ||
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| Author | Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. | ||||
| Title | On Checking Equivalence of Simulation Scripts | Type | Journal Article | ||
| Year | 2021 | Publication | Journal of Logical and Algebraic Methods in Programming | Abbreviated Journal | |
| Volume | Issue | Pages | 100640 | ||
| Keywords | Formal verification, Simulation based formal verification, Formal Verification of cyber-physical systems, System-level formal verification | ||||
| Abstract | To support Model Based Design of Cyber-Physical Systems (CPSs) many simulation based approaches to System Level Formal Verification (SLFV) have been devised. Basically, these are Bounded Model Checking approaches (since simulation horizon is of course bounded) relying on simulators to compute the system dynamics and thereby verify the given system properties. The main obstacle to simulation based SLFV is the large number of simulation scenarios to be considered and thus the huge amount of simulation time needed to complete the verification task. To save on computation time, simulation based SLFV approaches exploit the capability of simulators to save and restore simulation states. Essentially, such a time saving is obtained by optimising the simulation script defining the simulation activity needed to carry out the verification task. Although such approaches aim to (bounded) formal verification, as a matter of fact, the proof of correctness of the methods to optimise simulation scripts basically relies on an intuitive semantics for simulation scripting languages. This hampers the possibility of formally showing that the optimisations introduced to speed up the simulation activity do not actually omit checking of relevant behaviours for the system under verification. The aim of this paper is to fill the above gap by presenting an operational semantics for simulation scripting languages and by proving soundness and completeness properties for it. This, in turn, enables formal proofs of equivalence between unoptimised and optimised simulation scripts. | ||||
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| Series Volume | Series Issue | Edition | |||
| ISSN | 2352-2208 | ISBN | Medium | ||
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| Notes | Approved | no | |||
| Call Number |
MCLab @ davi @ Mancini2021100640 | Serial | 183 | ||
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| Author | Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. | ||||
| Title | Anytime system level verification via parallel random exhaustive hardware in the loop simulation | Type | Journal Article | ||
| Year | 2016 | Publication | Microprocessors and Microsystems | Abbreviated Journal | |
| Volume | 41 | Issue | Pages | 12-28 | |
| Keywords | Model Checking of Hybrid Systems; Model checking driven simulation; Hardware in the loop simulation | ||||
| Abstract | Abstract System level verification of cyber-physical systems has the goal of verifying that the whole (i.e., software + hardware) system meets the given specifications. Model checkers for hybrid systems cannot handle system level verification of actual systems. Thus, Hardware In the Loop Simulation (HILS) is currently the main workhorse for system level verification. By using model checking driven exhaustive HILS, System Level Formal Verification (SLFV) can be effectively carried out for actual systems. We present a parallel random exhaustive HILS based model checker for hybrid systems that, by simulating all operational scenarios exactly once in a uniform random order, is able to provide, at any time during the verification process, an upper bound to the probability that the System Under Verification exhibits an error in a yet-to-be-simulated scenario (Omission Probability). We show effectiveness of the proposed approach by presenting experimental results on SLFV of the Inverted Pendulum on a Cart and the Fuel Control System examples in the Simulink distribution. To the best of our knowledge, no previously published model checker can exhaustively verify hybrid systems of such a size and provide at any time an upper bound to the Omission Probability. | ||||
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| ISSN | 0141-9331 | ISBN | Medium | ||
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| Notes | Approved | no | |||
| Call Number |
MCLab @ davi @ Mancini201612 | Serial | 155 | ||
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