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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | A Map-Reduce Parallel Approach to Automatic Synthesis of Control Software | Type | Report | ||
| Year | 2012 | Publication | Abbreviated Journal | ||
| Volume | abs/1210.2276 | Issue | Pages | ||
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| Abstract | Many Control Systems are indeed Software Based Control Systems, i.e. control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of control software.
Available algorithms and tools (e.g., QKS) may require weeks or even months of computation to synthesize control software for large-size systems. This motivates search for parallel algorithms for control software synthesis. In this paper, we present a map-reduce style parallel algorithm for control software synthesis when the controlled system (plant) is modeled as discrete time linear hybrid system. Furthermore we present an MPI-based implementation PQKS of our algorithm. To the best of our knowledge, this is the first parallel approach for control software synthesis. We experimentally show effectiveness of PQKS on two classical control synthesis problems: the inverted pendulum and the multi-input buck DC/DC converter. Experiments show that PQKS efficiency is above 65%. As an example, PQKS requires about 16 hours to complete the synthesis of control software for the pendulum on a cluster with 60 processors, instead of the 25 days needed by the sequential algorithm in QKS. |
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ | Serial | 101 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Control Software Visualization | Type | Conference Article | ||
| Year | 2012 | Publication | Proceedings of INFOCOMP 2012, The Second International Conference on Advanced Communications and Computation | Abbreviated Journal | |
| Volume | Issue | Pages | 15-20 | ||
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| Publisher | ThinkMind | Place of Publication | Editor | ||
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| ISSN | 978-1-61208-226-4 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ infocomp2012 | Serial | 100 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Linear Constraints as a Modeling Language for Discrete Time Hybrid Systems | Type | Conference Article | ||
| Year | 2012 | Publication | Proceedings of ICSEA 2012, The Seventh International Conference on Software Engineering Advances | Abbreviated Journal | |
| Volume | Issue | Pages | 664-671 | ||
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| Publisher | ThinkMind | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ icsea12 | Serial | 98 | ||
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| Author | Mazzini, Silvia; Puri, Stefano; Mari, Federico; Melatti, Igor; Tronci, Enrico | ||||
| Title | Formal Verification at System Level | Type | Conference Article | ||
| Year | 2009 | Publication | In: DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. Instanbul, Turkey, EuroSpace | Abbreviated Journal | |
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| Abstract | System Level Analysis calls for a language comprehensible to experts with different background and yet precise enough to support meaningful analyses. SysML is emerging as an effective balance between such conflicting goals. In this paper we outline some the results obtained as for SysML based system level functional formal verification by an ESA/ESTEC study, with a collaboration among INTECS and La Sapienza University of Roma. The study focuses on SysML based system level functional requirements techniques. | ||||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dasia09 | Serial | 20 | ||
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| Author | Cavaliere, Federico; Mari, Federico; Melatti, Igor; Minei, Giovanni; Salvo, Ivano; Tronci, Enrico; Verzino, Giovanni; Yushtein, Yuri | ||||
| Title | Model Checking Satellite Operational Procedures | Type | Conference Article | ||
| Year | 2011 | Publication | DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. San Anton, Malta, EuroSpace. | Abbreviated Journal | |
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| Abstract | We present a model checking approach for the automatic verification of satellite operational procedures (OPs). Building a model for a complex system as a satellite is a hard task. We overcome this obstruction by using a suitable simulator (SIMSAT) for the satellite. Our approach aims at improving OP quality assurance by automatic exhaustive exploration of all possible simulation scenarios. Moreover, our solution decreases OP verification costs by using a model checker (CMurphi) to automatically drive the simulator. We model OPs as user-executed programs observing the simulator telemetries and sending telecommands to the simulator. In order to assess feasibility of our approach we present experimental results on a simple meaningful scenario. Our results show that we can save up to 90% of verification time. | ||||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dasia11 | Serial | 13 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | From Boolean Relations to Control Software | Type | Conference Article | ||
| Year | 2011 | Publication | Proceedings of ICSEA 2011, The Sixth International Conference on Software Engineering Advances | Abbreviated Journal | |
| Volume | Issue | Pages | 528-533 | ||
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| Abstract | Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. | ||||
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| Publisher | ThinkMind | Place of Publication | Editor | ||
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| ISSN | 978-1-61208-165-6 | ISBN | Medium | ||
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| Notes | Best Paper Award | Approved | yes | ||
| Call Number | Sapienza @ mari @ icsea11 | Serial | 14 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico | ||||
| Title | Exploiting Hub States in Automatic Verification | Type | Conference Article | ||
| Year | 2005 | Publication | Automated Technology for Verification and Analysis: Third International Symposium, ATVA 2005, Taipei, Taiwan, October 4-7, 2005, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 54-68 | ||
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| Abstract | In this paper we present a new algorithm to counteract state explosion when using Explicit State Space Exploration to verify protocol-like systems. We sketch the implementation of our algorithm within the Caching Mur$\varphi$ verifier and give experimental results showing its effectiveness. We show experimentally that, when memory is a scarce resource, our algorithm improves on the time performances of Caching Mur$\varphi$ verification algorithm, saving between 16% and 68% (45% on average) in computation time. | ||||
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| Publisher | Springer | Place of Publication | Editor | D.A. Peled; Y.-K. Tsay | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 3707 | Series Issue | Edition | ||
| ISSN | 3-540-29209-8 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dimt04 | Serial | 83 | ||
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| Author | Melatti, Igor; Palmer, Robert; Sawaya, Geoffrey; Yang, Yu; Kirby, Robert Mike; Gopalakrishnan, Ganesh | ||||
| Title | Parallel and Distributed Model Checking in Eddy | Type | Conference Article | ||
| Year | 2006 | Publication | Model Checking Software, 13th International SPIN Workshop, Vienna, Austria, March 30 – April 1, 2006, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 108-125 | ||
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| Abstract | Model checking of safety properties can be scaled up by pooling the CPU and memory resources of multiple computers. As compute clusters containing 100s of nodes, with each node realized using multi-core (e.g., 2) CPUs will be widespread, a model checker based on the parallel (shared memory) and distributed (message passing) paradigms will more efficiently use the hardware resources. Such a model checker can be designed by having each node employ two shared memory threads that run on the (typically) two CPUs of a node, with one thread responsible for state generation, and the other for efficient communication, including (i) performing overlapped asynchronous message passing, and (ii) aggregating the states to be sent into larger chunks in order to improve communication network utilization. We present the design details of such a novel model checking architecture called Eddy. We describe the design rationale, details of how the threads interact and yield control, exchange messages, as well as detect termination. We have realized an instance of this architecture for the Murphi modeling language. Called Eddy_Murphi, we report its performance over the number of nodes as well as communication parameters such as those controlling state aggregation. Nearly linear reduction of compute time with increasing number of nodes is observed. Our thread task partition is done in such a way that it is modular, easy to port across different modeling languages, and easy to tune across a variety of platforms. | ||||
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| Publisher | Springer - Verlag | Place of Publication | Editor | Valmari, A. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 3925 | Series Issue | Edition | ||
| ISSN | 0302-9743 | ISBN | 978-3-540-33102-5 | Medium | |
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Mpsykg06 | Serial | 81 | ||
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| Author | Della Penna, Giuseppe; Di Marco, Antinisca; Intrigila, Benedetto; Melatti, Igor; Pierantonio, Alfonso | ||||
| Title | Xere: Towards a Natural Interoperability between XML and ER Diagrams | Type | Conference Article | ||
| Year | 2003 | Publication | Fundamental Approaches to Software Engineering, 6th International Conference, FASE 2003, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2003, Warsaw, Poland, April 7-11, 2003, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 356-371 | ||
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| Abstract | XML (eXtensible Markup Language) is becoming the standard format for documents on Internet and is widely used to exchange data. Often, the relevant information contained in XML documents needs to be also stored in legacy databases (DB) in order to integrate the new data with the pre-existing ones. In this paper, we introduce a technique for the automatic XML-DB integration, which we call Xere. In particular we present, as the first step of Xere, the mapping algorithm which allows the translation of XML Schemas into Entity-Relationship diagrams. | ||||
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| Publisher | Springer | Place of Publication | Editor | Pezzè, M. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 2621 | Series Issue | Edition | ||
| ISSN | 3-540-00899-3 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Ddimp03 | Serial | 86 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Minichino, Michele; Ciancamerla, Ester; Parisse, Andrea; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Automatic Verification of a Turbogas Control System with the Mur$\varphi$ Verifier | Type | Conference Article | ||
| Year | 2003 | Publication | Hybrid Systems: Computation and Control, 6th International Workshop, HSCC 2003 Prague, Czech Republic, April 3-5, 2003, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 141-155 | ||
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| Abstract | Automatic analysis of Hybrid Systems poses formidable challenges both from a modeling as well as from a verification point of view. We present a case study on automatic verification of a Turbogas Control System (TCS) using an extended version of the Mur$\varphi$ verifier. TCS is the heart of ICARO, a 2MW Co-generative Electric Power Plant. For large hybrid systems, as TCS is, the modeling effort accounts for a significant part of the whole verification activity. In order to ease our modeling effort we extended the Mur$\varphi$ verifier by importing the C language long double type (finite precision real numbers) into it. We give experimental results on running our extended Mur$\varphi$ on our TCS model. For example using Mur$\varphi$ we were able to compute an admissible range of values for the variation speed of the user demand of electric power to the turbogas. | ||||
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| Publisher | Springer | Place of Publication | Editor | Maler, O.; Pnueli, A. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 2623 | Series Issue | Edition | ||
| ISSN | 3-540-00913-2 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dimmcptz03 | Serial | 88 | ||
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