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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Minichino, Michele; Ciancamerla, Ester; Parisse, Andrea; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Automatic Verification of a Turbogas Control System with the Mur$\varphi$ Verifier | Type | Conference Article | ||
| Year | 2003 | Publication | Hybrid Systems: Computation and Control, 6th International Workshop, HSCC 2003 Prague, Czech Republic, April 3-5, 2003, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 141-155 | ||
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| Abstract | Automatic analysis of Hybrid Systems poses formidable challenges both from a modeling as well as from a verification point of view. We present a case study on automatic verification of a Turbogas Control System (TCS) using an extended version of the Mur$\varphi$ verifier. TCS is the heart of ICARO, a 2MW Co-generative Electric Power Plant. For large hybrid systems, as TCS is, the modeling effort accounts for a significant part of the whole verification activity. In order to ease our modeling effort we extended the Mur$\varphi$ verifier by importing the C language long double type (finite precision real numbers) into it. We give experimental results on running our extended Mur$\varphi$ on our TCS model. For example using Mur$\varphi$ we were able to compute an admissible range of values for the variation speed of the user demand of electric power to the turbogas. | ||||
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| Publisher | Springer | Place of Publication | Editor | Maler, O.; Pnueli, A. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 2623 | Series Issue | Edition | ||
| ISSN | 3-540-00913-2 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dimmcptz03 | Serial | 88 | ||
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| Author | Della Penna, Giuseppe; Di Marco, Antinisca; Intrigila, Benedetto; Melatti, Igor; Pierantonio, Alfonso | ||||
| Title | Xere: Towards a Natural Interoperability between XML and ER Diagrams | Type | Conference Article | ||
| Year | 2003 | Publication | Fundamental Approaches to Software Engineering, 6th International Conference, FASE 2003, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2003, Warsaw, Poland, April 7-11, 2003, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 356-371 | ||
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| Abstract | XML (eXtensible Markup Language) is becoming the standard format for documents on Internet and is widely used to exchange data. Often, the relevant information contained in XML documents needs to be also stored in legacy databases (DB) in order to integrate the new data with the pre-existing ones. In this paper, we introduce a technique for the automatic XML-DB integration, which we call Xere. In particular we present, as the first step of Xere, the mapping algorithm which allows the translation of XML Schemas into Entity-Relationship diagrams. | ||||
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| Publisher | Springer | Place of Publication | Editor | Pezzè, M. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 2621 | Series Issue | Edition | ||
| ISSN | 3-540-00899-3 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Ddimp03 | Serial | 86 | ||
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| Author | Melatti, Igor; Palmer, Robert; Sawaya, Geoffrey; Yang, Yu; Kirby, Robert Mike; Gopalakrishnan, Ganesh | ||||
| Title | Parallel and Distributed Model Checking in Eddy | Type | Conference Article | ||
| Year | 2006 | Publication | Model Checking Software, 13th International SPIN Workshop, Vienna, Austria, March 30 – April 1, 2006, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 108-125 | ||
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| Abstract | Model checking of safety properties can be scaled up by pooling the CPU and memory resources of multiple computers. As compute clusters containing 100s of nodes, with each node realized using multi-core (e.g., 2) CPUs will be widespread, a model checker based on the parallel (shared memory) and distributed (message passing) paradigms will more efficiently use the hardware resources. Such a model checker can be designed by having each node employ two shared memory threads that run on the (typically) two CPUs of a node, with one thread responsible for state generation, and the other for efficient communication, including (i) performing overlapped asynchronous message passing, and (ii) aggregating the states to be sent into larger chunks in order to improve communication network utilization. We present the design details of such a novel model checking architecture called Eddy. We describe the design rationale, details of how the threads interact and yield control, exchange messages, as well as detect termination. We have realized an instance of this architecture for the Murphi modeling language. Called Eddy_Murphi, we report its performance over the number of nodes as well as communication parameters such as those controlling state aggregation. Nearly linear reduction of compute time with increasing number of nodes is observed. Our thread task partition is done in such a way that it is modular, easy to port across different modeling languages, and easy to tune across a variety of platforms. | ||||
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| Publisher | Springer - Verlag | Place of Publication | Editor | Valmari, A. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 3925 | Series Issue | Edition | ||
| ISSN | 0302-9743 | ISBN | 978-3-540-33102-5 | Medium | |
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Mpsykg06 | Serial | 81 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico | ||||
| Title | Exploiting Hub States in Automatic Verification | Type | Conference Article | ||
| Year | 2005 | Publication | Automated Technology for Verification and Analysis: Third International Symposium, ATVA 2005, Taipei, Taiwan, October 4-7, 2005, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 54-68 | ||
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| Abstract | In this paper we present a new algorithm to counteract state explosion when using Explicit State Space Exploration to verify protocol-like systems. We sketch the implementation of our algorithm within the Caching Mur$\varphi$ verifier and give experimental results showing its effectiveness. We show experimentally that, when memory is a scarce resource, our algorithm improves on the time performances of Caching Mur$\varphi$ verification algorithm, saving between 16% and 68% (45% on average) in computation time. | ||||
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| Publisher | Springer | Place of Publication | Editor | D.A. Peled; Y.-K. Tsay | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 3707 | Series Issue | Edition | ||
| ISSN | 3-540-29209-8 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dimt04 | Serial | 83 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Model Based Synthesis of Control Software from System Level Formal Specifications | Type | Report | ||
| Year | 2013 | Publication | Abbreviated Journal | ||
| Volume | abs/1107.5638 | Issue | Pages | ||
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| Abstract | Many Embedded Systems are indeed Software Based Control Systems, that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of embedded systems control software.
We present an algorithm, along with a tool QKS implementing it, that from a formal model (as a Discrete Time Linear Hybrid System) of the controlled system (plant), implementation specifications (that is, number of bits in the Analog-to-Digital, AD, conversion) and System Level Formal Specifications (that is, safety and liveness requirements for the closed loop system) returns correct-by-construction control software that has a Worst Case Execution Time (WCET) linear in the number of AD bits and meets the given specifications. We show feasibility of our approach by presenting experimental results on using it to synthesize control software for a buck DC-DC converter, a widely used mixed-mode analog circuit, and for the inverted pendulum. |
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ | Serial | 104 | ||
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| Author | Tronci, E.; Mancini, T.; Mari, F.; Melatti, I.; Jacobsen, R. H.; Ebeid, E.; Mikkelsen, S. A.; Prodanovic, M.; Gruber, J. K.; Hayes, B. | ||||
| Title | SmartHG: Energy Demand Aware Open Services for Smart Grid Intelligent Automation | Type | Conference Article | ||
| Year | 2014 | Publication | Proceedings of the Work in Progress Session of SEAA/DSD 2014 | Abbreviated Journal | |
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| ISSN | ISBN | 978-3-902457-40-0 | Medium | ||
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| Notes | Approved | no | |||
| Call Number | Sapienza @ mari @ | Serial | 119 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Linear Constraints and Guarded Predicates as a Modeling Language for Discrete Time Hybrid Systems | Type | Journal Article | ||
| Year | 2013 | Publication | International Journal on Advances in Software | Abbreviated Journal | Intern. Journal on Advances in SW |
| Volume | vol. 6, nr 1&2 | Issue | Pages | 155-169 | |
| Keywords | Model-based software design; Linear predicates; Hybrid systems | ||||
| Abstract | Model based design is particularly appealing in
software based control systems (e.g., embedded software) design, since in such a case system level specifications are much easier to define than the control software behavior itself. In turn, model based design of embedded systems requires modeling both continuous subsystems (typically, the plant) as well as discrete subsystems (the controller). This is typically done using hybrid systems. Mixed Integer Linear Programming (MILP) based abstraction techniques have been successfully applied to automatically synthesize correct-by-construction control software for discrete time linear hybrid systems, where plant dynamics is modeled as a linear predicate over state, input, and next state variables. Unfortunately, MILP solvers require such linear predicates to be conjunctions of linear constraints, which is not a natural way of modeling hybrid systems. In this paper we show that, under the hypothesis that each variable ranges over a bounded interval, any linear predicate built upon conjunction and disjunction of linear constraints can be automatically translated into an equivalent conjunctive predicate. Since variable bounds play a key role in this translation, our algorithm includes a procedure to compute all implicit variable bounds of the given linear predicate. Furthermore, we show that a particular form of linear predicates, namely guarded predicates, are a natural and powerful language to succinctly model discrete time linear hybrid systems dynamics. Finally, we experimentally show the feasibility of our approach on an important and challenging case study taken from the literature, namely the multi-input Buck DC-DC Converter. As an example, the guarded predicate that models (with 57 constraints) a 6-inputs Buck DC-DC Converter is translated in a conjunctive predicate (with 102 linear constraints) in about 40 minutes. |
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| Publisher | IARIA | Place of Publication | Editor | Luigi Lavazza | |
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| Series Volume | Series Issue | Edition | |||
| ISSN | 1942-2628 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ melatti @ | Serial | 115 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Synthesizing Control Software from Boolean Relations | Type | Journal Article | ||
| Year | 2012 | Publication | International Journal on Advances in Software | Abbreviated Journal | Intern. Journal on Advances in SW |
| Volume | vol. 5, nr 3&4 | Issue | Pages | 212-223 | |
| Keywords | Control Software Synthesis; Embedded Systems; Model Checking | ||||
| Abstract | Many software as well digital hardware automatic
synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately, the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper, we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a worst case execution time linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. Moreover, a formal proof of the proposed algorithm correctness is also shown. Finally, we present experimental results showing effectiveness of the proposed algorithm. |
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| Publisher | IARIA | Place of Publication | Editor | Luigi Lavazza | |
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| ISSN | 1942-2628 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ melatti @ | Serial | 108 | ||
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| Author | Kuijpers, Ed; Carotenuto, Luigi; Malapert, Jean-Cristophe; Markov-Vetter, Daniela; Melatti, Igor; Orlandini, Andrea; Pinchuk, Ranni | ||||
| Title | Collaboration on ISS Experiment Data and Knowledge Representation | Type | Conference Article | ||
| Year | 2012 | Publication | Proc. of IAC 2012 | Abbreviated Journal | |
| Volume | D.5.11 | Issue | Pages | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ melatti @ | Serial | 107 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Quantized Feedback Control Software Synthesis from System Level Formal Specifications for Buck DC/DC Converters | Type | Report | ||
| Year | 2011 | Publication | Abbreviated Journal | ||
| Volume | abs/1105.5640 | Issue | Pages | ||
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| Abstract | Many Embedded Systems are indeed Software Based Control Systems (SBCSs), that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of SBCS control software. In previous works we presented an algorithm, along with a tool QKS implementing it, that from a formal model (as a Discrete Time Linear Hybrid System, DTLHS) of the controlled system (plant), implementation specifications (that is, number of bits in the Analog-to-Digital, AD, conversion) and System Level Formal Specifications (that is, safety and liveness requirements for the closed loop system) returns correct-by-construction control software that has a Worst Case Execution Time (WCET) linear in the number of AD bits and meets the given specifications. In this technical report we present full experimental results on using it to synthesize control software for two versions of buck DC-DC converters (single-input and multi-input), a widely used mixed-mode analog circuit. | ||||
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ | Serial | 106 | ||
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