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| Author | Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E.; Gruber, J.K.; Hayes, B.; Prodanovic, M.; Elmegaard, L. | ||||
| Title | User Flexibility Aware Price Policy Synthesis for Smart Grids | Type | Conference Article | ||
| Year | 2015 | Publication | Digital System Design (DSD), 2015 Euromicro Conference on | Abbreviated Journal | |
| Volume | Issue | Pages | 478-485 | ||
| Keywords | Contracts; Current measurement; Load management; Power demand; Power measurement; State estimation; Substations; Grid State Estimation; Peak Shaving; Policy Robustness Verification; Price Policy Synthesis | ||||
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| Notes | Approved | no | |||
| Call Number | Sapienza @ preissler @ Mancini_etal2015_3 | Serial | 136 | ||
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| Author | Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E. | ||||
| Title | An Efficient Algorithm for Network Vulnerability Analysis Under Malicious Attacks | Type | Conference Article | ||
| Year | 2018 | Publication | Foundations of Intelligent Systems – 24th International Symposium, ISMIS 2018, Limassol, Cyprus, October 29-31, 2018, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 302-312 | ||
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| Notes | Best Paper | Approved | no | ||
| Call Number | MCLab @ davi @ DBLP:conf/ismis/ManciniMMST18 | Serial | 176 | ||
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| Author | Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. | ||||
| Title | Anytime system level verification via parallel random exhaustive hardware in the loop simulation | Type | Journal Article | ||
| Year | 2016 | Publication | Microprocessors and Microsystems | Abbreviated Journal | |
| Volume | 41 | Issue | Pages | 12-28 | |
| Keywords | Model Checking of Hybrid Systems; Model checking driven simulation; Hardware in the loop simulation | ||||
| Abstract | Abstract System level verification of cyber-physical systems has the goal of verifying that the whole (i.e., software + hardware) system meets the given specifications. Model checkers for hybrid systems cannot handle system level verification of actual systems. Thus, Hardware In the Loop Simulation (HILS) is currently the main workhorse for system level verification. By using model checking driven exhaustive HILS, System Level Formal Verification (SLFV) can be effectively carried out for actual systems. We present a parallel random exhaustive HILS based model checker for hybrid systems that, by simulating all operational scenarios exactly once in a uniform random order, is able to provide, at any time during the verification process, an upper bound to the probability that the System Under Verification exhibits an error in a yet-to-be-simulated scenario (Omission Probability). We show effectiveness of the proposed approach by presenting experimental results on SLFV of the Inverted Pendulum on a Cart and the Fuel Control System examples in the Simulink distribution. To the best of our knowledge, no previously published model checker can exhaustively verify hybrid systems of such a size and provide at any time an upper bound to the Omission Probability. | ||||
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| ISSN | 0141-9331 | ISBN | Medium | ||
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| Notes | Approved | no | |||
| Call Number | MCLab @ davi @ Mancini201612 | Serial | 155 | ||
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| Author | Alimguzhin, V.; Mari, F.; Melatti, I.; Tronci, E.; Ebeid, E.; Mikkelsen, S.A.; Jacobsen, R.H.; Gruber, J.K.; Hayes, B.; Huerta, F.; Prodanovic, M. | ||||
| Title | A Glimpse of SmartHG Project Test-bed and Communication Infrastructure | Type | Conference Article | ||
| Year | 2015 | Publication | Digital System Design (DSD), 2015 Euromicro Conference on | Abbreviated Journal | |
| Volume | Issue | Pages | 225-232 | ||
| Keywords | Batteries; Control systems; Databases; Production; Sensors; Servers; Smart grids; Grid State Estimation; Peak Shaving; Policy Robustness Verification; Price Policy Synthesis | ||||
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| Call Number | Sapienza @ preissler @ Alimguzhin_etal2015 | Serial | 127 | ||
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| Author | Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico | ||||
| Title | Simulator Semantics for System Level Formal Verification | Type | Conference Article | ||
| Year | 2015 | Publication | Proceedings Sixth International Symposium on Games, Automata, Logics and Formal Verification (GandALF 2015), | Abbreviated Journal | |
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| Notes | Approved | no | |||
| Call Number | MCLab @ davi @ | Serial | 125 | ||
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| Author | Toni Mancini; Enrico Tronci; Ivano Salvo; Federico Mari; Annalisa Massini; Igor Melatti | ||||
| Title | Computing Biological Model Parameters by Parallel Statistical Model Checking | Type | Journal Article | ||
| Year | 2015 | Publication | International Work Conference on Bioinformatics and Biomedical Engineering (IWBBIO 2015) | Abbreviated Journal | |
| Volume | 9044 | Issue | Pages | 542-554 | |
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| Call Number | MCLab @ davi @ | Serial | 124 | ||
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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | On Model Based Synthesis of Embedded Control Software | Type | Report | ||
| Year | 2012 | Publication | Abbreviated Journal | ||
| Volume | abs/1207.4474 | Issue | Pages | ||
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| Abstract | Many Embedded Systems are indeed Software Based Control Systems (SBCSs), that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for control software. Given the formal model of a plant as a Discrete Time Linear Hybrid System and the implementation specifications (that is, number of bits in the Analog-to-Digital (AD) conversion) correct-by-construction control software can be automatically generated from System Level Formal Specifications of the closed loop system (that is, safety and liveness requirements), by computing a suitable finite abstraction of the plant.
With respect to given implementation specifications, the automatically generated code implements a time optimal control strategy (in terms of set-up time), has a Worst Case Execution Time linear in the number of AD bits $b$, but unfortunately, its size grows exponentially with respect to $b$. In many embedded systems, there are severe restrictions on the computational resources (such as memory or computational power) available to microcontroller devices. This paper addresses model based synthesis of control software by trading system level non-functional requirements (such us optimal set-up time, ripple) with software non-functional requirements (its footprint). Our experimental results show the effectiveness of our approach: for the inverted pendulum benchmark, by using a quantization schema with 12 bits, the size of the small controller is less than 6% of the size of the time optimal one. |
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| Publisher | CoRR, Technical Report | Place of Publication | Editor |
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ | Serial | 102 | ||
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| Author | Della Penna, Giuseppe; Tofani, Alberto; Pecorari, Marcello; Raparelli, Orazio; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico | ||||
| Title | A Case Study on Automated Generation of Integration Tests | Type | Conference Article | ||
| Year | 2006 | Publication | Fdl | Abbreviated Journal | |
| Volume | Issue | Pages | 278-284 | ||
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| Publisher | Ecsi | Place of Publication | Editor |
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| ISSN | 978-3-00-019710-9 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dtprimt06 | Serial | 27 | ||
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| Author | Cavaliere, Federico; Mari, Federico; Melatti, Igor; Minei, Giovanni; Salvo, Ivano; Tronci, Enrico; Verzino, Giovanni; Yushtein, Yuri | ||||
| Title | Model Checking Satellite Operational Procedures | Type | Conference Article | ||
| Year | 2011 | Publication | DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. San Anton, Malta, EuroSpace. | Abbreviated Journal | |
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| Abstract | We present a model checking approach for the automatic verification of satellite operational procedures (OPs). Building a model for a complex system as a satellite is a hard task. We overcome this obstruction by using a suitable simulator (SIMSAT) for the satellite. Our approach aims at improving OP quality assurance by automatic exhaustive exploration of all possible simulation scenarios. Moreover, our solution decreases OP verification costs by using a model checker (CMurphi) to automatically drive the simulator. We model OPs as user-executed programs observing the simulator telemetries and sending telecommands to the simulator. In order to assess feasibility of our approach we present experimental results on a simple meaningful scenario. Our results show that we can save up to 90% of verification time. | ||||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dasia11 | Serial | 13 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | From Boolean Relations to Control Software | Type | Conference Article | ||
| Year | 2011 | Publication | Proceedings of ICSEA 2011, The Sixth International Conference on Software Engineering Advances | Abbreviated Journal | |
| Volume | Issue | Pages | 528-533 | ||
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| Abstract | Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. | ||||
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| Publisher | ThinkMind | Place of Publication | Editor |
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| ISSN | 978-1-61208-165-6 | ISBN | Medium | ||
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| Notes | Best Paper Award | Approved | yes | ||
| Call Number | Sapienza @ mari @ icsea11 | Serial | 14 | ||
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