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Author Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico
Title A Map-Reduce Parallel Approach to Automatic Synthesis of Control Software Type Conference Article
Year 2013 Publication Proc. of International SPIN Symposium on Model Checking of Software (SPIN 2013) Abbreviated Journal International SPIN Symposium on Model Checking of Software
Volume Issue (down) Pages 43-60
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Corporate Author Thesis
Publisher Springer - Verlag Place of Publication Editor
Language Summary Language Original Title
Series Editor Series Title Lecture Notes in Computer Science Abbreviated Series Title
Series Volume 7976 Series Issue Edition
ISSN 0302-9743 ISBN 978-3-642-39175-0 Medium
Area Expedition Conference
Notes Approved no
Call Number Sapienza @ melatti @ Serial 112
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Author Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico
Title On-the-Fly Control Software Synthesis Type Conference Article
Year 2013 Publication Proceedings of International SPIN Symposium on Model Checking of Software (SPIN 2013) Abbreviated Journal International SPIN Symposium on Model Checking of Software
Volume Issue (down) Pages 61-80
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Abstract
Address
Corporate Author Thesis
Publisher Springer - Verlag Place of Publication Editor
Language Summary Language Original Title
Series Editor Series Title Lecture Notes in Computer Science Abbreviated Series Title
Series Volume 7976 Series Issue Edition
ISSN 0302-9743 ISBN 978-3-642-39175-0 Medium
Area Expedition Conference
Notes Approved yes
Call Number Sapienza @ melatti @ Serial 111
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Author Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico
Title Synthesizing Control Software from Boolean Relations Type Journal Article
Year 2012 Publication International Journal on Advances in Software Abbreviated Journal Intern. Journal on Advances in SW
Volume vol. 5, nr 3&4 Issue (down) Pages 212-223
Keywords Control Software Synthesis; Embedded Systems; Model Checking
Abstract Many software as well digital hardware automatic
synthesis methods define the set of
implementations meeting the given system
specifications with a boolean relation K. In
such a context a fundamental step in the software
(hardware) synthesis process is finding effective
solutions to the functional equation defined by
K. This entails finding a (set of) boolean
function(s) F (typically represented using
OBDDs, Ordered Binary Decision Diagrams)
such that: 1) for all x for which K is
satisfiable, K(x, F(x)) = 1 holds; 2) the
implementation of F is efficient with respect
to given implementation parameters such as code
size or execution time. While this problem has
been widely studied in digital hardware synthesis,
little has been done in a software synthesis
context. Unfortunately, the approaches developed
for hardware synthesis cannot be directly used in
a software context. This motivates investigation
of effective methods to solve the above problem
when F has to be implemented with software. In
this paper, we present an algorithm that, from an
OBDD representation for K, generates a C code
implementation for F that has the same size as
the OBDD for F and a worst case execution time
linear in nr, being n = |x| the number of
input arguments for functions in F and r the
number of functions in F. Moreover, a formal
proof of the proposed algorithm correctness is
also shown. Finally, we present experimental
results showing effectiveness of the proposed
algorithm.
Address
Corporate Author Thesis
Publisher IARIA Place of Publication Editor Luigi Lavazza
Language Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN 1942-2628 ISBN Medium
Area Expedition Conference
Notes Approved yes
Call Number Sapienza @ melatti @ Serial 108
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Author Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico
Title SyLVaaS: System Level Formal Verification as a Service Type Conference Article
Year 2015 Publication Proceedings of the 23rd Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP 2015), special session on Formal Approaches to Parallel and Distributed Systems (4PAD) Abbreviated Journal
Volume Issue (down) Pages
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Publisher Place of Publication Editor
Language Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN ISBN Medium
Area Expedition Conference
Notes Approved no
Call Number MCLab @ davi @ Serial 123
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Author Toni Mancini; Enrico Tronci; Ivano Salvo; Federico Mari; Annalisa Massini; Igor Melatti
Title Computing Biological Model Parameters by Parallel Statistical Model Checking Type Journal Article
Year 2015 Publication International Work Conference on Bioinformatics and Biomedical Engineering (IWBBIO 2015) Abbreviated Journal
Volume 9044 Issue (down) Pages 542-554
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Publisher Place of Publication Editor
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Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN ISBN Medium
Area Expedition Conference
Notes Approved no
Call Number MCLab @ davi @ Serial 124
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Author Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico
Title Simulator Semantics for System Level Formal Verification Type Conference Article
Year 2015 Publication Proceedings Sixth International Symposium on Games, Automata, Logics and Formal Verification (GandALF 2015), Abbreviated Journal
Volume Issue (down) Pages
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Publisher Place of Publication Editor
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Series Volume Series Issue Edition
ISSN ISBN Medium
Area Expedition Conference
Notes Approved no
Call Number MCLab @ davi @ Serial 125
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Author Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico
Title Model Based Synthesis of Control Software from System Level Formal Specifications Type Report
Year 2013 Publication Abbreviated Journal
Volume abs/1107.5638 Issue (down) Pages
Keywords
Abstract Many Embedded Systems are indeed Software Based Control Systems, that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of embedded systems control software.
We present an algorithm, along with a tool QKS implementing it, that from a formal model (as a Discrete Time Linear Hybrid System) of the controlled system (plant), implementation specifications (that is, number of bits in the Analog-to-Digital, AD, conversion) and System Level Formal Specifications (that is, safety and liveness requirements for the closed loop system) returns correct-by-construction control software that has a Worst Case Execution Time (WCET) linear in the number of AD bits and meets the given specifications.
We show feasibility of our approach by presenting experimental results on using it to synthesize control software for a buck DC-DC converter, a widely used mixed-mode analog circuit, and for the inverted pendulum.
Address
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Publisher CoRR, Technical Report Place of Publication Editor
Language Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN ISBN Medium
Area Expedition Conference
Notes Approved yes
Call Number Sapienza @ mari @ Serial 104
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Author Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E.
Title Anytime system level verification via parallel random exhaustive hardware in the loop simulation Type Journal Article
Year 2016 Publication Microprocessors and Microsystems Abbreviated Journal
Volume 41 Issue (down) Pages 12-28
Keywords Model Checking of Hybrid Systems; Model checking driven simulation; Hardware in the loop simulation
Abstract Abstract System level verification of cyber-physical systems has the goal of verifying that the whole (i.e., software + hardware) system meets the given specifications. Model checkers for hybrid systems cannot handle system level verification of actual systems. Thus, Hardware In the Loop Simulation (HILS) is currently the main workhorse for system level verification. By using model checking driven exhaustive HILS, System Level Formal Verification (SLFV) can be effectively carried out for actual systems. We present a parallel random exhaustive HILS based model checker for hybrid systems that, by simulating all operational scenarios exactly once in a uniform random order, is able to provide, at any time during the verification process, an upper bound to the probability that the System Under Verification exhibits an error in a yet-to-be-simulated scenario (Omission Probability). We show effectiveness of the proposed approach by presenting experimental results on SLFV of the Inverted Pendulum on a Cart and the Fuel Control System examples in the Simulink distribution. To the best of our knowledge, no previously published model checker can exhaustively verify hybrid systems of such a size and provide at any time an upper bound to the Omission Probability.
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Corporate Author Thesis
Publisher Place of Publication Editor
Language Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN 0141-9331 ISBN Medium
Area Expedition Conference
Notes Approved no
Call Number MCLab @ davi @ Mancini201612 Serial 155
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Author Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E.
Title An Efficient Algorithm for Network Vulnerability Analysis Under Malicious Attacks Type Conference Article
Year 2018 Publication Foundations of Intelligent Systems – 24th International Symposium, ISMIS 2018, Limassol, Cyprus, October 29-31, 2018, Proceedings Abbreviated Journal
Volume Issue (down) Pages 302-312
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Notes Best Paper Approved no
Call Number MCLab @ davi @ DBLP:conf/ismis/ManciniMMST18 Serial 176
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Author Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E.; Gruber, J.K.; Hayes, B.; Prodanovic, M.; Elmegaard, L.
Title User Flexibility Aware Price Policy Synthesis for Smart Grids Type Conference Article
Year 2015 Publication Digital System Design (DSD), 2015 Euromicro Conference on Abbreviated Journal
Volume Issue (down) Pages 478-485
Keywords Contracts; Current measurement; Load management; Power demand; Power measurement; State estimation; Substations; Grid State Estimation; Peak Shaving; Policy Robustness Verification; Price Policy Synthesis
Abstract
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Publisher Place of Publication Editor
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Series Editor Series Title Abbreviated Series Title
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Area Expedition Conference
Notes Approved no
Call Number Sapienza @ preissler @ Mancini_etal2015_3 Serial 136
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