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Author |
Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
A Map-Reduce Parallel Approach to Automatic Synthesis of Control Software |
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Conference Article |
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2013 |
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Proc. of International SPIN Symposium on Model Checking of Software (SPIN 2013) |
Abbreviated Journal |
International SPIN Symposium on Model Checking of Software |
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43-60 |
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Springer - Verlag |
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Lecture Notes in Computer Science |
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7976 |
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0302-9743 |
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978-3-642-39175-0 |
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Call Number |
Sapienza @ melatti @ |
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112 |
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Author |
Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
On-the-Fly Control Software Synthesis |
Type |
Conference Article |
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Year |
2013 |
Publication |
Proceedings of International SPIN Symposium on Model Checking of Software (SPIN 2013) |
Abbreviated Journal |
International SPIN Symposium on Model Checking of Software |
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61-80 |
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Springer - Verlag |
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Lecture Notes in Computer Science |
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7976 |
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0302-9743 |
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978-3-642-39175-0 |
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yes |
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Call Number |
Sapienza @ melatti @ |
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111 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
Synthesizing Control Software from Boolean Relations |
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Journal Article |
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Year |
2012 |
Publication |
International Journal on Advances in Software |
Abbreviated Journal |
Intern. Journal on Advances in SW |
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Volume |
vol. 5, nr 3&4 |
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212-223 |
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Keywords |
Control Software Synthesis; Embedded Systems; Model Checking |
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Abstract |
Many software as well digital hardware automatic
synthesis methods define the set of
implementations meeting the given system
specifications with a boolean relation K. In
such a context a fundamental step in the software
(hardware) synthesis process is finding effective
solutions to the functional equation defined by
K. This entails finding a (set of) boolean
function(s) F (typically represented using
OBDDs, Ordered Binary Decision Diagrams)
such that: 1) for all x for which K is
satisfiable, K(x, F(x)) = 1 holds; 2) the
implementation of F is efficient with respect
to given implementation parameters such as code
size or execution time. While this problem has
been widely studied in digital hardware synthesis,
little has been done in a software synthesis
context. Unfortunately, the approaches developed
for hardware synthesis cannot be directly used in
a software context. This motivates investigation
of effective methods to solve the above problem
when F has to be implemented with software. In
this paper, we present an algorithm that, from an
OBDD representation for K, generates a C code
implementation for F that has the same size as
the OBDD for F and a worst case execution time
linear in nr, being n = |x| the number of
input arguments for functions in F and r the
number of functions in F. Moreover, a formal
proof of the proposed algorithm correctness is
also shown. Finally, we present experimental
results showing effectiveness of the proposed
algorithm. |
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IARIA |
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Luigi Lavazza |
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1942-2628 |
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yes |
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Call Number |
Sapienza @ melatti @ |
Serial |
108 |
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Author |
Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico |
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Title |
SyLVaaS: System Level Formal Verification as a Service |
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Conference Article |
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Year |
2015 |
Publication |
Proceedings of the 23rd Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP 2015), special session on Formal Approaches to Parallel and Distributed Systems (4PAD) |
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no |
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Call Number |
MCLab @ davi @ |
Serial |
123 |
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Author |
Toni Mancini; Enrico Tronci; Ivano Salvo; Federico Mari; Annalisa Massini; Igor Melatti |
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Title |
Computing Biological Model Parameters by Parallel Statistical Model Checking |
Type |
Journal Article |
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Year |
2015 |
Publication |
International Work Conference on Bioinformatics and Biomedical Engineering (IWBBIO 2015) |
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Volume |
9044 |
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542-554 |
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Call Number |
MCLab @ davi @ |
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124 |
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Author |
Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico |
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Title |
Simulator Semantics for System Level Formal Verification |
Type |
Conference Article |
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Year |
2015 |
Publication |
Proceedings Sixth International Symposium on Games, Automata, Logics and Formal Verification (GandALF 2015), |
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Call Number |
MCLab @ davi @ |
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125 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
Model Based Synthesis of Control Software from System Level Formal Specifications |
Type |
Report |
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Year |
2013 |
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abs/1107.5638 |
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Abstract |
Many Embedded Systems are indeed Software Based Control Systems, that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of embedded systems control software.
We present an algorithm, along with a tool QKS implementing it, that from a formal model (as a Discrete Time Linear Hybrid System) of the controlled system (plant), implementation specifications (that is, number of bits in the Analog-to-Digital, AD, conversion) and System Level Formal Specifications (that is, safety and liveness requirements for the closed loop system) returns correct-by-construction control software that has a Worst Case Execution Time (WCET) linear in the number of AD bits and meets the given specifications.
We show feasibility of our approach by presenting experimental results on using it to synthesize control software for a buck DC-DC converter, a widely used mixed-mode analog circuit, and for the inverted pendulum. |
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CoRR, Technical Report |
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yes |
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Call Number |
Sapienza @ mari @ |
Serial |
104 |
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Author |
Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
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Title |
Anytime system level verification via parallel random exhaustive hardware in the loop simulation |
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Journal Article |
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Year |
2016 |
Publication |
Microprocessors and Microsystems |
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41 |
Issue |
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12-28 |
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Keywords |
Model Checking of Hybrid Systems; Model checking driven simulation; Hardware in the loop simulation |
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Abstract |
Abstract System level verification of cyber-physical systems has the goal of verifying that the whole (i.e., software + hardware) system meets the given specifications. Model checkers for hybrid systems cannot handle system level verification of actual systems. Thus, Hardware In the Loop Simulation (HILS) is currently the main workhorse for system level verification. By using model checking driven exhaustive HILS, System Level Formal Verification (SLFV) can be effectively carried out for actual systems. We present a parallel random exhaustive HILS based model checker for hybrid systems that, by simulating all operational scenarios exactly once in a uniform random order, is able to provide, at any time during the verification process, an upper bound to the probability that the System Under Verification exhibits an error in a yet-to-be-simulated scenario (Omission Probability). We show effectiveness of the proposed approach by presenting experimental results on SLFV of the Inverted Pendulum on a Cart and the Fuel Control System examples in the Simulink distribution. To the best of our knowledge, no previously published model checker can exhaustively verify hybrid systems of such a size and provide at any time an upper bound to the Omission Probability. |
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0141-9331 |
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MCLab @ davi @ Mancini201612 |
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155 |
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Author |
Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E. |
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Title |
An Efficient Algorithm for Network Vulnerability Analysis Under Malicious Attacks |
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2018 |
Publication |
Foundations of Intelligent Systems – 24th International Symposium, ISMIS 2018, Limassol, Cyprus, October 29-31, 2018, Proceedings |
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302-312 |
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Best Paper |
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MCLab @ davi @ DBLP:conf/ismis/ManciniMMST18 |
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176 |
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Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E.; Gruber, J.K.; Hayes, B.; Prodanovic, M.; Elmegaard, L. |
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Title |
User Flexibility Aware Price Policy Synthesis for Smart Grids |
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2015 |
Publication |
Digital System Design (DSD), 2015 Euromicro Conference on |
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478-485 |
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Keywords |
Contracts; Current measurement; Load management; Power demand; Power measurement; State estimation; Substations; Grid State Estimation; Peak Shaving; Policy Robustness Verification; Price Policy Synthesis |
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Sapienza @ preissler @ Mancini_etal2015_3 |
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