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Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
Title | A Map-Reduce Parallel Approach to Automatic Synthesis of Control Software | Type | Conference Article | ||
Year | 2013 | Publication | Proc. of International SPIN Symposium on Model Checking of Software (SPIN 2013) | Abbreviated Journal | International SPIN Symposium on Model Checking of Software |
Volume | Issue | Pages | 43-60 | ||
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Publisher | Springer - Verlag | Place of Publication | Editor | ||
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Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
Series Volume | 7976 | Series Issue | Edition | ||
ISSN | 0302-9743 | ISBN | 978-3-642-39175-0 | Medium | |
Area | Expedition | Conference | |||
Notes | Approved | no | |||
Call Number | Sapienza @ melatti @ | Serial | 112 | ||
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Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
Title | On-the-Fly Control Software Synthesis | Type | Conference Article | ||
Year | 2013 | Publication | Proceedings of International SPIN Symposium on Model Checking of Software (SPIN 2013) | Abbreviated Journal | International SPIN Symposium on Model Checking of Software |
Volume | Issue | Pages | 61-80 | ||
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Publisher | Springer - Verlag | Place of Publication | Editor | ||
Language | Summary Language | Original Title | |||
Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
Series Volume | 7976 | Series Issue | Edition | ||
ISSN | 0302-9743 | ISBN | 978-3-642-39175-0 | Medium | |
Area | Expedition | Conference | |||
Notes | Approved | yes | |||
Call Number | Sapienza @ melatti @ | Serial | 111 | ||
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Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
Title | Model Based Synthesis of Control Software from System Level Formal Specifications | Type | Journal Article | ||
Year | 2014 | Publication | ACM TRANSACTIONS ON SOFTWARE ENGINEERING AND METHODOLOGY | Abbreviated Journal | ACM TRANSACTIONS ON SOFTWARE ENGINEERING AND METHODOLOGY |
Volume | 23 | Issue | 1 | Pages | Article 6 |
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Publisher | ACM | Place of Publication | Editor | ||
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ISSN | 1049-331X | ISBN | Medium | ||
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Notes | Approved | no | |||
Call Number | Sapienza @ melatti @ | Serial | 110 | ||
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Author | Mari, Federico; Melatti, Igor; Tronci, Enrico; Finzi, Alberto | ||||
Title | A multi-hop advertising discovery and delivering protocol for multi administrative domain MANET | Type | Journal Article | ||
Year | 2013 | Publication | Mobile Information Systems | Abbreviated Journal | Mobile Information Systems |
Volume | 3 | Issue | 9 | Pages | 261-280 |
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Publisher | IOS Press | Place of Publication | Editor | ||
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ISSN | 1574-017x (Print) 1875-905X (Online) | ISBN | Medium | ||
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Notes | Approved | no | |||
Call Number | Sapienza @ melatti @ | Serial | 109 | ||
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Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
Title | Synthesizing Control Software from Boolean Relations | Type | Journal Article | ||
Year | 2012 | Publication | International Journal on Advances in Software | Abbreviated Journal | Intern. Journal on Advances in SW |
Volume | vol. 5, nr 3&4 | Issue | Pages | 212-223 | |
Keywords | Control Software Synthesis; Embedded Systems; Model Checking | ||||
Abstract | Many software as well digital hardware automatic
synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately, the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper, we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a worst case execution time linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. Moreover, a formal proof of the proposed algorithm correctness is also shown. Finally, we present experimental results showing effectiveness of the proposed algorithm. |
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Publisher | IARIA | Place of Publication | Editor | Luigi Lavazza | |
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ISSN | 1942-2628 | ISBN | Medium | ||
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Notes | Approved | yes | |||
Call Number | Sapienza @ melatti @ | Serial | 108 | ||
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Author | Kuijpers, Ed; Carotenuto, Luigi; Malapert, Jean-Cristophe; Markov-Vetter, Daniela; Melatti, Igor; Orlandini, Andrea; Pinchuk, Ranni | ||||
Title | Collaboration on ISS Experiment Data and Knowledge Representation | Type | Conference Article | ||
Year | 2012 | Publication | Proc. of IAC 2012 | Abbreviated Journal | |
Volume | D.5.11 | Issue | Pages | ||
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Notes | Approved | yes | |||
Call Number | Sapienza @ melatti @ | Serial | 107 | ||
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Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
Title | Quantized Feedback Control Software Synthesis from System Level Formal Specifications for Buck DC/DC Converters | Type | Report | ||
Year | 2011 | Publication | Abbreviated Journal | ||
Volume | abs/1105.5640 | Issue | Pages | ||
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Abstract | Many Embedded Systems are indeed Software Based Control Systems (SBCSs), that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of SBCS control software. In previous works we presented an algorithm, along with a tool QKS implementing it, that from a formal model (as a Discrete Time Linear Hybrid System, DTLHS) of the controlled system (plant), implementation specifications (that is, number of bits in the Analog-to-Digital, AD, conversion) and System Level Formal Specifications (that is, safety and liveness requirements for the closed loop system) returns correct-by-construction control software that has a Worst Case Execution Time (WCET) linear in the number of AD bits and meets the given specifications. In this technical report we present full experimental results on using it to synthesize control software for two versions of buck DC-DC converters (single-input and multi-input), a widely used mixed-mode analog circuit. | ||||
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Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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Notes | Approved | yes | |||
Call Number | Sapienza @ mari @ | Serial | 106 | ||
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Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
Title | From Boolean Functional Equations to Control Software | Type | Report | ||
Year | 2011 | Publication | Abbreviated Journal | ||
Volume | abs/1106.0468 | Issue | Pages | ||
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Abstract | Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) at most O(nr), being n = |x| the number of arguments of functions in F and r the number of functions in F. | ||||
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Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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Notes | Approved | yes | |||
Call Number | Sapienza @ mari @ | Serial | 105 | ||
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Author | Ehrig, R.; Dierkes, T.; Schaefer, S.; Roeblitz, S.; Tronci, E.; Mancini, T.; Salvo, I.; Alimguzhin, V.; Mari, F.; Melatti, I.; Massini, A.; Leeners, B.; Krueger, T.H.C.; Egli, M.; Ille, F. | ||||
Title | An integrative approach for model driven computation of treatments in reproductive medicine | Type | Conference Article | ||
Year | 2015 | Publication | Proceedings of the 15th International Symposium on Mathematical and Computational Biology (BIOMAT 2015), Rorkee, India | Abbreviated Journal | |
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Notes | Approved | no | |||
Call Number | Sapienza @ preissler @ Ehrig_etal2015 | Serial | 144 | ||
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Author | Mancini, T.; Melatti, I.; Tronci, E. | ||||
Title | Any-horizon uniform random sampling and enumeration of constrained scenarios for simulation-based formal verification | Type | Journal Article | ||
Year | 2021 | Publication | IEEE Transactions on Software Engineering | Abbreviated Journal | |
Volume | Issue | Pages | 1-1 | ||
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Abstract | Model-based approaches to the verification of non-terminating Cyber-Physical Systems (CPSs) usually rely on numerical simulation of the System Under Verification (SUV) model under input scenarios of possibly varying duration, chosen among those satisfying given constraints. Such constraints typically stem from requirements (or assumptions) on the SUV inputs and its operational environment as well as from the enforcement of additional conditions aiming at, e.g., prioritising the (often extremely long) verification activity, by, e.g., focusing on scenarios explicitly exercising selected requirements, or avoiding </i>vacuity</i> in their satisfaction. In this setting, the possibility to efficiently sample at random (with a known distribution, e.g., uniformly) within, or to efficiently enumerate (possibly in a uniformly random order) scenarios among those satisfying all the given constraints is a key enabler for the practical viability of the verification process, e.g., via simulation-based statistical model checking. Unfortunately, in case of non-trivial combinations of constraints, iterative approaches like Markovian random walks in the space of sequences of inputs in general fail in extracting scenarios according to a given distribution (e.g., uniformly), and can be very inefficient to produce at all scenarios that are both legal (with respect to SUV assumptions) and of interest (with respect to the additional constraints). For example, in our case studies, up to 91% of the scenarios generated using such iterative approaches would need to be neglected. In this article, we show how, given a set of constraints on the input scenarios succinctly defined by multiple finite memory monitors, a data structure (scenario generator) can be synthesised, from which any-horizon scenarios satisfying the input constraints can be efficiently extracted by (possibly uniform) random sampling or (randomised) enumeration. Our approach enables seamless support to virtually all simulation-based approaches to CPS verification, ranging from simple random testing to statistical model checking and formal (i.e., exhaustive) verification, when a suitable bound on the horizon or an iterative horizon enlargement strategy is defined, as in the spirit of bounded model checking. | ||||
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ISSN | 1939-3520 | ISBN | Medium | ||
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Notes | To appear | Approved | no | ||
Call Number | MCLab @ davi @ ref9527998 | Serial | 191 | ||
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