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Author |
Mancini, T.; Melatti, I.; Tronci, E. |
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Title |
Any-horizon uniform random sampling and enumeration of constrained scenarios for simulation-based formal verification |
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Journal Article |
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2021 |
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IEEE Transactions on Software Engineering |
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1-1 |
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Model-based approaches to the verification of non-terminating Cyber-Physical Systems (CPSs) usually rely on numerical simulation of the System Under Verification (SUV) model under input scenarios of possibly varying duration, chosen among those satisfying given constraints. Such constraints typically stem from requirements (or assumptions) on the SUV inputs and its operational environment as well as from the enforcement of additional conditions aiming at, e.g., prioritising the (often extremely long) verification activity, by, e.g., focusing on scenarios explicitly exercising selected requirements, or avoiding </i>vacuity</i> in their satisfaction. In this setting, the possibility to efficiently sample at random (with a known distribution, e.g., uniformly) within, or to efficiently enumerate (possibly in a uniformly random order) scenarios among those satisfying all the given constraints is a key enabler for the practical viability of the verification process, e.g., via simulation-based statistical model checking. Unfortunately, in case of non-trivial combinations of constraints, iterative approaches like Markovian random walks in the space of sequences of inputs in general fail in extracting scenarios according to a given distribution (e.g., uniformly), and can be very inefficient to produce at all scenarios that are both legal (with respect to SUV assumptions) and of interest (with respect to the additional constraints). For example, in our case studies, up to 91% of the scenarios generated using such iterative approaches would need to be neglected. In this article, we show how, given a set of constraints on the input scenarios succinctly defined by multiple finite memory monitors, a data structure (scenario generator) can be synthesised, from which any-horizon scenarios satisfying the input constraints can be efficiently extracted by (possibly uniform) random sampling or (randomised) enumeration. Our approach enables seamless support to virtually all simulation-based approaches to CPS verification, ranging from simple random testing to statistical model checking and formal (i.e., exhaustive) verification, when a suitable bound on the horizon or an iterative horizon enlargement strategy is defined, as in the spirit of bounded model checking. |
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1939-3520 |
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MCLab @ davi @ ref9527998 |
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191 |
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Melatti, I.; Mari, F.; Mancini, T.; Prodanovic, M.; Tronci, E. |
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Title |
A Two-Layer Near-Optimal Strategy for Substation Constraint Management via Home Batteries |
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Journal Article |
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2021 |
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IEEE Transactions on Industrial Electronics |
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1-1 |
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Within electrical distribution networks, substation constraints management requires that aggregated power demand from residential users is kept within suitable bounds. Efficiency of substation constraints management can be measured as the reduction of constraints violations w.r.t. unmanaged demand. Home batteries hold the promise of enabling efficient and user-oblivious substation constraints management. Centralized control of home batteries would achieve optimal efficiency. However, it is hardly acceptable by users, since service providers (e.g., utilities or aggregators) would directly control batteries at user premises. Unfortunately, devising efficient hierarchical control strategies, thus overcoming the above problem, is far from easy. We present a novel two-layer control strategy for home batteries that avoids direct control of home devices by the service provider and at the same time yields near-optimal substation constraints management efficiency. Our simulation results on field data from 62 households in Denmark show that the substation constraints management efficiency achieved with our approach is at least 82% of the one obtained with a theoretical optimal centralized strategy. |
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MCLab @ davi @ ref9513535 |
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190 |
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Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Automatic Control Software Synthesis for Quantized Discrete Time Hybrid Systems |
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2012 |
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Proceedings of the 51th IEEE Conference on Decision and Control, CDC 2012, December 10-13, 2012, Maui, HI, USA |
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6120-6125 |
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IEEE |
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978-1-4673-2065-8 |
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Techreport version can be found at http://arxiv.org/abs/1207.4098 |
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yes |
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Sapienza @ mari @ cdc12 |
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96 |
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Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
On Model Based Synthesis of Embedded Control Software |
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Conference Article |
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2012 |
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Proceedings of the 12th International Conference on Embedded Software, EMSOFT 2012, part of the Eighth Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12, 2012 |
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227-236 |
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ACM |
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Ahmed Jerraya and Luca P. Carloni and Florence Maraninchi and John Regehr |
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978-1-4503-1425-1 |
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Techreport version can be found at arxiv.org |
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yes |
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Sapienza @ mari @ emsoft12 |
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97 |
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Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
From Boolean Relations to Control Software |
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Conference Article |
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2011 |
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Proceedings of ICSEA 2011, The Sixth International Conference on Software Engineering Advances |
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528-533 |
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Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. |
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ThinkMind |
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978-1-61208-165-6 |
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Best Paper Award |
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yes |
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Sapienza @ mari @ icsea11 |
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14 |
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Author |
Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E. |
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Title |
An Efficient Algorithm for Network Vulnerability Analysis Under Malicious Attacks |
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Conference Article |
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2018 |
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Foundations of Intelligent Systems – 24th International Symposium, ISMIS 2018, Limassol, Cyprus, October 29-31, 2018, Proceedings |
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302-312 |
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MCLab @ davi @ DBLP:conf/ismis/ManciniMMST18 |
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176 |
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Tronci, E.; Mancini, T.; Salvo, I.; Mari, F.; Melatti, I.; Massini, A.; Sinisi, S.; Davì, F.; Dierkes, T.; Ehrig, R.; Röblitz, S.; Leeners, B.; Krüger, T.; Egli, M.; Ille, F. |
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Patient-Specific Models from Inter-Patient Biological Models and Clinical Records |
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Conference Article |
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2014 |
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Formal Methods in Computer-Aided Design (FMCAD) |
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Sapienza @ mari @ |
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120 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
Quantized Feedback Control Software Synthesis from System Level Formal Specifications for Buck DC/DC Converters |
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Report |
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2011 |
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abs/1105.5640 |
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Many Embedded Systems are indeed Software Based Control Systems (SBCSs), that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of SBCS control software. In previous works we presented an algorithm, along with a tool QKS implementing it, that from a formal model (as a Discrete Time Linear Hybrid System, DTLHS) of the controlled system (plant), implementation specifications (that is, number of bits in the Analog-to-Digital, AD, conversion) and System Level Formal Specifications (that is, safety and liveness requirements for the closed loop system) returns correct-by-construction control software that has a Worst Case Execution Time (WCET) linear in the number of AD bits and meets the given specifications. In this technical report we present full experimental results on using it to synthesize control software for two versions of buck DC-DC converters (single-input and multi-input), a widely used mixed-mode analog circuit. |
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CoRR, Technical Report |
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yes |
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Sapienza @ mari @ |
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106 |
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Tronci, E.; Mancini, T.; Mari, F.; Melatti, I.; Jacobsen, R. H.; Ebeid, E.; Mikkelsen, S. A.; Prodanovic, M.; Gruber, J. K.; Hayes, B. |
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SmartHG: Energy Demand Aware Open Services for Smart Grid Intelligent Automation |
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Conference Article |
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2014 |
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Proceedings of the Work in Progress Session of SEAA/DSD 2014 |
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978-3-902457-40-0 |
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Sapienza @ mari @ |
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119 |
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Mancini, Toni ; Mari, Federico ; Massini, Annalisa; Melatti, Igor; Tronci, Enrico |
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Title |
System Level Formal Verification via Distributed Multi-Core Hardware in the Loop Simulation |
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Conference Article |
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2014 |
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Proc. of the 22nd Euromicro International Conference on Parallel, Distributed and Network-Based Processing |
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Euromicro International Conference on Parallel, Distributed and Network-Based Processing |
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IEEE Computer Society |
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Sapienza @ melatti @ |
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118 |
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