Records |
Author |
Bobbio, Andrea; Bologna, Sandro; Minichino, Michele; Ciancamerla, Ester; Incalcaterra, Piero; Kropp, Corrado; Tronci, Enrico |
Title |
Advanced techniques for safety analysis applied to the gas turbine control system of Icaro co generative plant |
Type |
Conference Article |
Year |
2001 |
Publication |
X Convegno Tecnologie e Sistemi Energetici Complessi |
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Volume |
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Issue |
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Pages |
339-350 |
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Abstract |
The paper describes two complementary and integrable approaches, a probabilistic one and a deterministic one, based on classic and advanced modelling techniques for safety analysis of complex computer based systems. The probabilistic approach is based on classical and innovative probabilistic analysis methods. The deterministic approach is based on formal verification methods. Such approaches are applied to the gas turbine control system of ICARO co generative plant, in operation at ENEA CR Casaccia. The main difference between the two approaches, behind the underlining different theories, is that the probabilistic one addresses the control system by itself, as the set of sensors, processing units and actuators, while the deterministic one also includes the behaviour of the equipment under control which interacts with the control system. The final aim of the research, documented in this paper, is to explore an innovative method which put the probabilistic and deterministic approaches in a strong relation to overcome the drawbacks of their isolated, selective and fragmented use which can lead to inconsistencies in the evaluation results. |
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Place of Publication |
Genova, Italy |
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yes |
Call Number |
Sapienza @ mari @ tesec01 |
Serial |
65 |
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Author |
Böhm, Corrado; Tronci, Enrico |
Title |
X-Separability and Left-Invertibility in lambda-calculus |
Type |
Conference Article |
Year |
1987 |
Publication |
Symposium on Logic in Computer Science (LICS) |
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Issue |
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Pages |
320-328 |
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Publisher |
IEEE Computer Society |
Place of Publication |
Ithaca, New York, USA |
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yes |
Call Number |
Sapienza @ mari @ lics87 |
Serial |
63 |
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Author |
Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa |
Title |
Exploiting Transition Locality in Automatic Verification |
Type |
Conference Article |
Year |
2001 |
Publication |
11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) |
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Volume |
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Issue |
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Pages |
259-274 |
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Abstract |
In this paper we present an algorithm to contrast state explosion when using Explicit State Space Exploration to verify protocols. We show experimentally that protocols exhibit transition locality. We present a verification algorithm that exploits transition locality as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm is compatible with all Breadth First (BF) optimization techniques present in the Mur$\varphi$ verifier and it is by no means a substitute for any of them. In fact, since our algorithm trades space with time, it is typically most useful when one runs out of memory and has already used all other state reduction techniques present in the Mur$\varphi$ verifier. Our experimental results show that using our approach we can typically save more than 40% of RAM with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction. |
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Springer |
Place of Publication |
Livingston, Scotland, UK |
Editor |
Margaria, T.; Melham, T.F. |
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Lecture Notes in Computer Science |
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Series Volume |
2144 |
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3-540-42541-1 |
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yes |
Call Number |
Sapienza @ mari @ charme01 |
Serial |
44 |
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Author |
Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa |
Title |
A Probabilistic Approach to Automatic Verification of Concurrent Systems |
Type |
Conference Article |
Year |
2001 |
Publication |
8th Asia-Pacific Software Engineering Conference (APSEC) |
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Volume |
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Pages |
317-324 |
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Abstract |
The main barrier to automatic verification of concurrent systems is the huge amount of memory required to complete the verification task (state explosion). In this paper we present a probabilistic algorithm for automatic verification via model checking. Our algorithm trades space with time. In particular, when memory is full because of state explosion our algorithm does not give up verification. Instead it just proceeds at a lower speed and its results will only hold with some arbitrarily small error probability. Our preliminary experimental results show that by using our probabilistic algorithm we can typically save more than 30% of RAM with an average time penalty of about 100% w.r.t. a deterministic state space exploration with enough memory to complete the verification task. This is better than giving up the verification task because of lack of memory. |
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IEEE Computer Society |
Place of Publication |
Macau, China |
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ISSN |
0-7695-1408-1 |
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Approved |
yes |
Call Number |
Sapienza @ mari @ apsec01 |
Serial |
43 |
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Author |
Piperno, Adolfo; Tronci, Enrico |
Title |
Regular Systems of Equations in λ-calculus |
Type |
Conference Article |
Year |
1989 |
Publication |
Ictcs |
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Abstract |
Many problems arising in equational theories like Lambda-calculus and Combinatory Logic can be expressed by combinatory equations or systems of equations. However, the solvability problem for an arbitrarily given class of systems is in general undecidable. In this paper we shall focus our attention on a decidable class of systems, which will be called regular systems, and we shall analyse some classical problems and well-known properties of Lambda-calculus that can be described and solved by means of regular systems. The significance of such class will be emphasized showing that for slight extensions of it the solvability problem turns out to be undecidable. |
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Place of Publication |
Mantova - Italy |
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yes |
Call Number |
Sapienza @ mari @ ictcs89 |
Serial |
61 |
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Author |
Pugliese, Rosario; Tronci, Enrico |
Title |
Automatic Verification of a Hydroelectric Power Plant |
Type |
Conference Article |
Year |
1996 |
Publication |
Third International Symposium of Formal Methods Europe (FME), Co-Sponsored by IFIP WG 14.3 |
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Volume |
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Issue |
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Pages |
425-444 |
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Abstract |
We analyze the specification of a hydroelectric power plant by ENEL (the Italian Electric Company). Our goal is to show that for the specification of the plant (its control system in particular) some given properties hold. We were provided with an informal specification of the plant. From such informal specification we wrote a formal specification using the CCS/Meije process algebra formalism. We defined properties using μ-calculus. Automatic verification was carried out using model checking. This was done by translating our process algebra definitions (the model) and μ-calculus formulas into BDDs. In this paper we present the informal specification of the plant, its formal specification, some of the properties we verified and experimental results. |
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Springer |
Place of Publication |
Oxford, UK |
Editor |
Gaudel, M.-C.; Woodcock, J. |
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Series Title |
Lecture Notes in Computer Science |
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Series Volume |
1051 |
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Edition |
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ISSN |
3-540-60973-3 |
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Approved |
yes |
Call Number |
Sapienza @ mari @ fme96 |
Serial |
53 |
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Author |
Böhm, Corrado; Piperno, Adolfo; Tronci, Enrico |
Title |
Solving Equations in λ-calculus |
Type |
Conference Article |
Year |
1989 |
Publication |
Proc. of: Logic Colloquium 88 |
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Place of Publication |
Padova - Italy |
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yes |
Call Number |
Sapienza @ mari @ logic-colloquium-88 |
Serial |
62 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico; Alvisi, Lorenzo; Clement, Allen; Li, Harry |
Title |
Model Checking Nash Equilibria in MAD Distributed Systems |
Type |
Conference Article |
Year |
2008 |
Publication |
FMCAD '08: Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design |
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Volume |
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Issue |
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Pages |
1-8 |
Keywords |
Model Checking, MAD Distributed System, Nash Equilibrium |
Abstract |
We present a symbolic model checking algorithm for verification of Nash equilibria in finite state mechanisms modeling Multiple Administrative Domains (MAD) distributed systems. Given a finite state mechanism, a proposed protocol for each agent and an indifference threshold for rewards, our model checker returns PASS if the proposed protocol is a Nash equilibrium (up to the given indifference threshold) for the given mechanism, FAIL otherwise. We implemented our model checking algorithm inside the NuSMV model checker and present experimental results showing its effectiveness for moderate size mechanisms. For example, we can handle mechanisms which corresponding normal form games would have more than $10^20$ entries. To the best of our knowledge, no model checking algorithm for verification of mechanism Nash equilibria has been previously published. |
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IEEE Press |
Place of Publication |
Piscataway, NJ, USA |
Editor |
Cimatti, A.; Jones, R. |
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ISSN |
978-1-4244-2735-2 |
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Notes |
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Approved |
yes |
Call Number |
Sapienza @ mari @ MarMelSalTroAlvCle08 |
Serial |
93 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
Title |
Exploiting Transition Locality in the Disk Based Mur$\varphi$ Verifier |
Type |
Conference Article |
Year |
2002 |
Publication |
4th International Conference on Formal Methods in Computer-Aided Design (FMCAD) |
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Volume |
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Issue |
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Pages |
202-219 |
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Abstract |
The main obstruction to automatic verification of Finite State Systems is the huge amount of memory required to complete the verification task (state explosion). This motivates research on distributed as well as disk based verification algorithms. In this paper we present a disk based Breadth First Explicit State Space Exploration algorithm as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm exploits transition locality (i.e. the statistical fact that most transitions lead to unvisited states or to recently visited states) to decrease disk read accesses thus reducing the time overhead due to disk usage. A disk based verification algorithm for Mur$\varphi$ has been already proposed in the literature. To measure the time speed up due to locality exploitation we compared our algorithm with such previously proposed algorithm. Our experimental results show that our disk based verification algorithm is typically more than 10 times faster than such previously proposed disk based verification algorithm. To measure the time overhead due to disk usage we compared our algorithm with RAM based verification using the (standard) Mur$\varphi$ verifier with enough memory to complete the verification task. Our experimental results show that even when using 1/10 of the RAM needed to complete verification, our disk based algorithm is only between 1.4 and 5.3 times (3 times on average) slower than (RAM) Mur$\varphi$ with enough RAM memory to complete the verification task at hand. Using our disk based Mur$\varphi$ we were able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 gigabytes of RAM using RAM based Mur$\varphi$. |
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Springer |
Place of Publication |
Portland, OR, USA |
Editor |
Aagaard, M.; O'Leary, J.W. |
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Series Editor |
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Series Title |
Lecture Notes in Computer Science |
Abbreviated Series Title |
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Series Volume |
2517 |
Series Issue |
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Edition |
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ISSN |
3-540-00116-6 |
ISBN |
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Approved |
yes |
Call Number |
Sapienza @ mari @ fmcad02 |
Serial |
41 |
Permanent link to this record |
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Author |
Tronci, Enrico |
Title |
Hardware Verification, Boolean Logic Programming, Boolean Functional Programming |
Type |
Conference Article |
Year |
1995 |
Publication |
Tenth Annual IEEE Symposium on Logic in Computer Science (LICS) |
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Volume |
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Issue |
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Pages |
408-418 |
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Abstract |
One of the main obstacles to automatic verification of finite state systems (FSSs) is state explosion. In this respect automatic verification of an FSS M using model checking and binary decision diagrams (BDDs) has an intrinsic limitation: no automatic global optimization of the verification task is possible until a BDD representation for M is generated. This is because systems and specifications are defined using different languages. To perform global optimization before generating a BDD representation for M we propose to use the same language to define systems and specifications. We show that first order logic on a Boolean domain yields an efficient functional programming language that can be used to represent, specify and automatically verify FSSs, e.g. on a SUN Sparc Station 2 we were able to automatically verify a 64 bit commercial multiplier. |
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Publisher |
IEEE Computer Society |
Place of Publication |
San Diego, California |
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Notes |
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Approved |
yes |
Call Number |
Sapienza @ mari @ lics95 |
Serial |
56 |
Permanent link to this record |