| Records |
| Author |
Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E.; Gruber, J.K.; Hayes, B.; Prodanovic, M.; Elmegaard, L. |
| Title |
User Flexibility Aware Price Policy Synthesis for Smart Grids |
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Conference Article |
| Year |
2015 |
Publication |
Digital System Design (DSD), 2015 Euromicro Conference on |
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478-485 |
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Contracts; Current measurement; Load management; Power demand; Power measurement; State estimation; Substations; Grid State Estimation; Peak Shaving; Policy Robustness Verification; Price Policy Synthesis |
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Sapienza @ preissler @ Mancini_etal2015_3 |
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136 |
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Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E. |
| Title |
An Efficient Algorithm for Network Vulnerability Analysis Under Malicious Attacks |
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Conference Article |
| Year |
2018 |
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Foundations of Intelligent Systems – 24th International Symposium, ISMIS 2018, Limassol, Cyprus, October 29-31, 2018, Proceedings |
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302-312 |
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Best Paper |
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no |
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MCLab @ davi @ DBLP:conf/ismis/ManciniMMST18 |
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176 |
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Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
| Title |
Anytime system level verification via parallel random exhaustive hardware in the loop simulation |
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Journal Article |
| Year |
2016 |
Publication |
Microprocessors and Microsystems |
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| Volume |
41 |
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Pages |
12-28 |
| Keywords |
Model Checking of Hybrid Systems; Model checking driven simulation; Hardware in the loop simulation |
| Abstract |
Abstract System level verification of cyber-physical systems has the goal of verifying that the whole (i.e., software + hardware) system meets the given specifications. Model checkers for hybrid systems cannot handle system level verification of actual systems. Thus, Hardware In the Loop Simulation (HILS) is currently the main workhorse for system level verification. By using model checking driven exhaustive HILS, System Level Formal Verification (SLFV) can be effectively carried out for actual systems. We present a parallel random exhaustive HILS based model checker for hybrid systems that, by simulating all operational scenarios exactly once in a uniform random order, is able to provide, at any time during the verification process, an upper bound to the probability that the System Under Verification exhibits an error in a yet-to-be-simulated scenario (Omission Probability). We show effectiveness of the proposed approach by presenting experimental results on SLFV of the Inverted Pendulum on a Cart and the Fuel Control System examples in the Simulink distribution. To the best of our knowledge, no previously published model checker can exhaustively verify hybrid systems of such a size and provide at any time an upper bound to the Omission Probability. |
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0141-9331 |
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no |
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MCLab @ davi @ Mancini201612 |
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155 |
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Alimguzhin, V.; Mari, F.; Melatti, I.; Tronci, E.; Ebeid, E.; Mikkelsen, S.A.; Jacobsen, R.H.; Gruber, J.K.; Hayes, B.; Huerta, F.; Prodanovic, M. |
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A Glimpse of SmartHG Project Test-bed and Communication Infrastructure |
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Conference Article |
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2015 |
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Digital System Design (DSD), 2015 Euromicro Conference on |
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225-232 |
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Batteries; Control systems; Databases; Production; Sensors; Servers; Smart grids; Grid State Estimation; Peak Shaving; Policy Robustness Verification; Price Policy Synthesis |
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Sapienza @ preissler @ Alimguzhin_etal2015 |
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127 |
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Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico |
| Title |
Simulator Semantics for System Level Formal Verification |
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Conference Article |
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2015 |
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Proceedings Sixth International Symposium on Games, Automata, Logics and Formal Verification (GandALF 2015), |
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no |
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MCLab @ davi @ |
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125 |
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Toni Mancini; Enrico Tronci; Ivano Salvo; Federico Mari; Annalisa Massini; Igor Melatti |
| Title |
Computing Biological Model Parameters by Parallel Statistical Model Checking |
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Journal Article |
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2015 |
Publication |
International Work Conference on Bioinformatics and Biomedical Engineering (IWBBIO 2015) |
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9044 |
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542-554 |
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MCLab @ davi @ |
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124 |
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Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico |
| Title |
SyLVaaS: System Level Formal Verification as a Service |
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Conference Article |
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2015 |
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Proceedings of the 23rd Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP 2015), special session on Formal Approaches to Parallel and Distributed Systems (4PAD) |
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MCLab @ davi @ |
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123 |
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Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico |
| Title |
Anytime System Level Verification via Random Exhaustive Hardware In The Loop Simulation |
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Conference Article |
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2014 |
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In Proceedings of 17th EuroMicro Conference on Digital System Design (DSD 2014) |
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MCLab @ davi @ |
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122 |
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| Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
| Title |
From Boolean Functional Equations to Control Software |
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Report |
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2011 |
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abs/1106.0468 |
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Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) at most O(nr), being n = |x| the number of arguments of functions in F and r the number of functions in F. |
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CoRR, Technical Report |
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yes |
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Sapienza @ mari @ |
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105 |
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| Author |
Della Penna, Giuseppe; Tofani, Alberto; Pecorari, Marcello; Raparelli, Orazio; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico |
| Title |
A Case Study on Automated Generation of Integration Tests |
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2006 |
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Fdl |
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278-284 |
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Ecsi |
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978-3-00-019710-9 |
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yes |
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Sapienza @ mari @ Dtprimt06 |
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27 |
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