| Records |
| Author |
Böhm, Corrado; Tronci, Enrico |
| Title |
X-separability and left-invertibility in the λ-calculus (extended abstract, invited paper) |
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Conference Article |
| Year |
1987 |
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Proceedings of: Temi e prospettive della Logica e della Filosofia della Scienza contemporanea |
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Cesena - Italy |
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yes |
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Sapienza @ mari @ cesena87 |
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64 |
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| Author |
Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico |
| Title |
Simulator Semantics for System Level Formal Verification |
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Conference Article |
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2015 |
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Proceedings Sixth International Symposium on Games, Automata, Logics and Formal Verification (GandALF 2015), |
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MCLab @ davi @ |
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125 |
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| Author |
Sinisi, S.; Alimguzhin, V.; Mancini, T.; Tronci, E. |
| Title |
Reconciling interoperability with efficient Verification and Validation within open source simulation environments |
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Journal Article |
| Year |
2021 |
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Simulation Modelling Practice and Theory |
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102277 |
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Simulation, Verification and Validation, Interoperability, FMI/FMU, Model Exchange, Cyber-Physical Systems |
| Abstract |
A Cyber-Physical System (CPS) comprises physical as well as software subsystems. Simulation-based approaches are typically used to support design and Verification and Validation (V&V) of CPSs in several domains such as: aerospace, defence, automotive, smart grid and healthcare. Accordingly, many simulation-based tools are available to support CPS design. This, on one side, enables designers to choose the toolchain that best suits their needs, on the other side poses huge interoperability challenges when one needs to simulate CPSs whose subsystems have been designed and modelled using different toolchains. To overcome such an interoperability problem, in 2010 the Functional Mock-up Interface (FMI) has been proposed as an open standard to support both Model Exchange (ME) and Co-Simulation (CS) of simulation models created with different toolchains. FMI has been adopted by several modelling and simulation environments. Models adhering to such a standard are called Functional Mock-up Units (FMUs). Indeed FMUs play an essential role in defining complex CPSs through, e.g., the System Structure and Parametrization (SSP) standard. Simulation-based V&V of CPSs typically requires exploring different simulation scenarios (i.e., exogenous input sequences to the CPS under design). Many such scenarios have a shared prefix. Accordingly, to avoid simulating many times such shared prefixes, the simulator state at the end of a shared prefix is saved and then restored and used as a start state for the simulation of the next scenario. In this context, an important FMI feature is the capability to save and restore the internal FMU state on demand. This is crucial to increase efficiency of simulation-based V&V. Unfortunately, the implementation of this feature is not mandatory and it is available only within some commercial software. As a result, the interoperability enabled by the FMI standard cannot be fully exploited for V&V when using open-source simulation environments. This motivates developing such a feature for open-source CPS simulation environments. Accordingly, in this paper, we focus on JModelica, an open-source modelling and simulation environment for CPSs based on an open standard modelling language, namely Modelica. We describe how we have endowed JModelica with our open-source implementation of the FMI 2.0 functions needed to save and restore internal states of FMUs for ME. Furthermore, we present experimental results evaluating, through 934 benchmark models, correctness and efficiency of our extended JModelica. Our experimental results show that simulation-based V&V is, on average, 22 times faster with our get/set functionality than without it. |
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1569-190x |
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no |
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MCLab @ davi @ Sinisi2021102277 |
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186 |
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| Author |
Tronci, Enrico |
| Title |
Equational Programming in lambda-calculus |
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Conference Article |
| Year |
1991 |
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Sixth Annual IEEE Symposium on Logic in Computer Science (LICS) |
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191-202 |
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IEEE Computer Society |
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Amsterdam, The Netherlands |
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yes |
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Sapienza @ mari @ lics91 |
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58 |
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| Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico; Alvisi, Lorenzo; Clement, Allen; Li, Harry |
| Title |
Model Checking Coalition Nash Equilibria in MAD Distributed Systems |
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Conference Article |
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2009 |
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Stabilization, Safety, and Security of Distributed Systems, 11th International Symposium, SSS 2009, Lyon, France, November 3-6, 2009. Proceedings |
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531-546 |
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We present two OBDD based model checking algorithms for the verification of Nash equilibria in finite state mechanisms modeling Multiple Administrative Domains (MAD) distributed systems with possibly colluding agents (coalitions) and with possibly faulty or malicious nodes (Byzantine agents). Given a finite state mechanism, a proposed protocol for each agent and the maximum sizes f for Byzantine agents and q for agents collusions, our model checkers return Pass if the proposed protocol is an ε-f-q-Nash equilibrium, i.e. no coalition of size up to q may have an interest greater than ε in deviating from the proposed protocol when up to f Byzantine agents are present, Fail otherwise. We implemented our model checking algorithms within the NuSMV model checker: the first one explicitly checks equilibria for each coalition, while the second represents symbolically all coalitions. We present experimental results showing their effectiveness for moderate size mechanisms. For example, we can verify coalition Nash equilibria for mechanisms which corresponding normal form games would have more than $5 \times 10^21$ entries. Moreover, we compare the two approaches, and the explicit algorithm turns out to outperform the symbolic one. To the best of our knowledge, no model checking algorithm for verification of Nash equilibria of mechanisms with coalitions has been previously published. |
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Springer |
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Guerraoui, R.; Petit, F. |
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Lecture Notes in Computer Science |
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5873 |
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yes |
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Sapienza @ mari @ sss09 |
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19 |
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| Author |
Tronci, Enrico |
| Title |
Introductory Paper |
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Journal Article |
| Year |
2006 |
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Sttt |
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8 |
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4-5 |
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355-358 |
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In today’s competitive market designing of digital systems (hardware as well as software) faces tremendous challenges. In fact, notwithstanding an ever decreasing project budget, time to market and product lifetime, designers are faced with an ever increasing system complexity and customer expected quality. The above situation calls for better and better formal verification techniques at all steps of the design flow. This special issue is devoted to publishing revised versions of contributions first presented at the 12th Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) held 21–24 October 2003 in L’Aquila, Italy. Authors of well regarded papers from CHARME’03 were invited to submit to this special issue. All papers included here have been suitably extended and have undergone an independent round of reviewing. |
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yes |
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Sapienza @ mari @ sttt06 |
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30 |
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| Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa |
| Title |
Exploiting Transition Locality in Automatic Verification of Finite State Concurrent Systems |
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Journal Article |
| Year |
2004 |
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Sttt |
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6 |
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4 |
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320-341 |
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In this paper we show that statistical properties of the transition graph of a system to be verified can be exploited to improve memory or time performances of verification algorithms. We show experimentally that protocols exhibit transition locality. That is, with respect to levels of a breadth-first state space exploration, state transitions tend to be between states belonging to close levels of the transition graph. We support our claim by measuring transition locality for the set of protocols included in the Mur$\varphi$ verifier distribution. We present a cache-based verification algorithm that exploits transition locality to decrease memory usage and a disk-based verification algorithm that exploits transition locality to decrease disk read accesses, thus reducing the time overhead due to disk usage. Both algorithms have been implemented within the Mur$\varphi$ verifier. Our experimental results show that our cache-based algorithm can typically save more than 40% of memory with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction, whereas our disk-based verification algorithm is typically more than ten times faster than a previously proposed disk-based verification algorithm and, even when using 10% of the memory needed to complete verification, it is only between 40 and 530% (300% on average) slower than (RAM) Mur$\varphi$ with enough memory to complete the verification task at hand. Using just 300 MB of memory our disk-based Mur$\varphi$ was able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 GB of memory using standard Mur$\varphi$. |
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yes |
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Sapienza @ mari @ DIMTZ04j |
Serial |
91 |
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| Author |
Böhm, Corrado; Tronci, Enrico |
| Title |
X-Separability and Left-Invertibility in lambda-calculus |
Type |
Conference Article |
| Year |
1987 |
Publication |
Symposium on Logic in Computer Science (LICS) |
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Pages |
320-328 |
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IEEE Computer Society |
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Ithaca, New York, USA |
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yes |
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Sapienza @ mari @ lics87 |
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63 |
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Tronci, Enrico |
| Title |
Hardware Verification, Boolean Logic Programming, Boolean Functional Programming |
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Conference Article |
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1995 |
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Tenth Annual IEEE Symposium on Logic in Computer Science (LICS) |
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408-418 |
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One of the main obstacles to automatic verification of finite state systems (FSSs) is state explosion. In this respect automatic verification of an FSS M using model checking and binary decision diagrams (BDDs) has an intrinsic limitation: no automatic global optimization of the verification task is possible until a BDD representation for M is generated. This is because systems and specifications are defined using different languages. To perform global optimization before generating a BDD representation for M we propose to use the same language to define systems and specifications. We show that first order logic on a Boolean domain yields an efficient functional programming language that can be used to represent, specify and automatically verify FSSs, e.g. on a SUN Sparc Station 2 we were able to automatically verify a 64 bit commercial multiplier. |
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IEEE Computer Society |
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San Diego, California |
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yes |
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Sapienza @ mari @ lics95 |
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56 |
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Cesta, Amedeo; Finzi, Alberto; Fratini, Simone; Orlandini, Andrea; Tronci, Enrico |
| Title |
Validation and verification issues in a timeline-based planning system |
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Journal Article |
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2010 |
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The Knowledge Engineering Review |
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25 |
Issue |
03 |
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299-318 |
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One of the key points to take into account to foster effective introduction of AI planning and scheduling systems in real world is to develop end user trust in the related technologies. Automated planning and scheduling systems often brings solutions to the users which are neither “obviousÃ¢â‚¬Âť nor immediately acceptable for them. This is due to the ability of these tools to take into account quite an amount of temporal and causal constraints and to employ resolution processes often designed to optimize the solution with respect to non trivial evaluation functions. To increase technology trust, the study of tools for verifying and validating plans and schedules produced by AI systems might be instrumental. In general, validation and verification techniques represent a needed complementary technology in developing domain independent architectures for automated problem solving. This paper presents a preliminary report of the issues concerned with the use of two software tools for formal verification of finite state systems to the validation of the solutions produced by MrSPOCK, a recent effort for building a timeline based planning tool in an ESA project. |
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Cambridge University Press |
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yes |
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Sapienza @ mari @ Cffot10 |
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18 |
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