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Author |
Tronci, Enrico |
Title |
Automatic Synthesis of Control Software for an Industrial Automation Control System |
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Conference Article |
Year |
1999 |
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Proc.of: 14th IEEE International Conference on: Automated Software Engineering (ASE) |
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247-250 |
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We present a case study on automatic synthesis of control software from formal specifications for an industrial automation control system. Our aim is to compare the effectiveness (i.e. design effort and controller quality) of automatic controller synthesis from closed loop formal specifications with that of manual controller design, followed by automatic verification. Our experimental results show that for industrial automation control systems, automatic synthesis is a viable and profitable (especially as far as design effort is concerned) alternative to manual design, followed by automatic verification. |
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Cocoa Beach, Florida, USA |
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yes |
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Sapienza @ mari @ ase99 |
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49 |
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Author |
Tronci, Enrico |
Title |
Automatic Synthesis of Controllers from Formal Specifications |
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Conference Article |
Year |
1998 |
Publication |
Proc of 2nd IEEE International Conference on Formal Engineering Methods (ICFEM) |
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134-143 |
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Many safety critical reactive systems are indeed embedded control systems. Usually a control system can be partitioned into two main subsystems: a controller and a plant. Roughly speaking: the controller observes the state of the plant and sends commands (stimulus) to the plant to achieve predefined goals. We show that when the plant can be modeled as a deterministic finite state system (FSS) it is possible to effectively use formal methods to automatically synthesize the program implementing the controller from the plant model and the given formal specifications for the closed loop system (plant+controller). This guarantees that the controller program is correct by construction. To the best of our knowledge there is no previously published effective algorithm to extract executable code for the controller from closed loop formal specifications. We show practical usefulness of our techniques by giving experimental results on their use to synthesize C programs implementing optimal controllers (OCs) for plants with more than 109 states. |
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Brisbane, Queensland, Australia |
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yes |
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Sapienza @ mari @ icfem98 |
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52 |
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Author |
Tronci, Enrico |
Title |
Equational Programming in Lambda-Calculus via SL-Systems. Part 1 |
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Journal Article |
Year |
1996 |
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Theoretical Computer Science |
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160 |
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1&2 |
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145-184 |
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yes |
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Sapienza @ mari @ tcs96 |
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54 |
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Author |
Tronci, Enrico |
Title |
Equational Programming in Lambda-Calculus via SL-Systems. Part 2 |
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Journal Article |
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1996 |
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Theoretical Computer Science |
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160 |
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1&2 |
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185-216 |
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yes |
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Sapienza @ mari @ tcs96a |
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55 |
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Author |
Bobbio, Andrea; Bologna, Sandro; Minichino, Michele; Ciancamerla, Ester; Incalcaterra, Piero; Kropp, Corrado; Tronci, Enrico |
Title |
Advanced techniques for safety analysis applied to the gas turbine control system of Icaro co generative plant |
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Conference Article |
Year |
2001 |
Publication |
X Convegno Tecnologie e Sistemi Energetici Complessi |
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339-350 |
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The paper describes two complementary and integrable approaches, a probabilistic one and a deterministic one, based on classic and advanced modelling techniques for safety analysis of complex computer based systems. The probabilistic approach is based on classical and innovative probabilistic analysis methods. The deterministic approach is based on formal verification methods. Such approaches are applied to the gas turbine control system of ICARO co generative plant, in operation at ENEA CR Casaccia. The main difference between the two approaches, behind the underlining different theories, is that the probabilistic one addresses the control system by itself, as the set of sensors, processing units and actuators, while the deterministic one also includes the behaviour of the equipment under control which interacts with the control system. The final aim of the research, documented in this paper, is to explore an innovative method which put the probabilistic and deterministic approaches in a strong relation to overcome the drawbacks of their isolated, selective and fragmented use which can lead to inconsistencies in the evaluation results. |
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Genova, Italy |
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Sapienza @ mari @ tesec01 |
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65 |
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Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa |
Title |
Exploiting Transition Locality in Automatic Verification of Finite State Concurrent Systems |
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Journal Article |
Year |
2004 |
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Sttt |
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6 |
Issue |
4 |
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320-341 |
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In this paper we show that statistical properties of the transition graph of a system to be verified can be exploited to improve memory or time performances of verification algorithms. We show experimentally that protocols exhibit transition locality. That is, with respect to levels of a breadth-first state space exploration, state transitions tend to be between states belonging to close levels of the transition graph. We support our claim by measuring transition locality for the set of protocols included in the Mur$\varphi$ verifier distribution. We present a cache-based verification algorithm that exploits transition locality to decrease memory usage and a disk-based verification algorithm that exploits transition locality to decrease disk read accesses, thus reducing the time overhead due to disk usage. Both algorithms have been implemented within the Mur$\varphi$ verifier. Our experimental results show that our cache-based algorithm can typically save more than 40% of memory with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction, whereas our disk-based verification algorithm is typically more than ten times faster than a previously proposed disk-based verification algorithm and, even when using 10% of the memory needed to complete verification, it is only between 40 and 530% (300% on average) slower than (RAM) Mur$\varphi$ with enough memory to complete the verification task at hand. Using just 300 MB of memory our disk-based Mur$\varphi$ was able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 GB of memory using standard Mur$\varphi$. |
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yes |
Call Number |
Sapienza @ mari @ DIMTZ04j |
Serial |
91 |
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