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| Author | Mancini, T.; Melatti, I.; Tronci, E. | ||||
| Title | Any-horizon uniform random sampling and enumeration of constrained scenarios for simulation-based formal verification | Type | Journal Article | ||
| Year | 2021 | Publication | IEEE Transactions on Software Engineering | Abbreviated Journal | |
| Volume | Issue | Pages | 1-1 | ||
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| Abstract | Model-based approaches to the verification of non-terminating Cyber-Physical Systems (CPSs) usually rely on numerical simulation of the System Under Verification (SUV) model under input scenarios of possibly varying duration, chosen among those satisfying given constraints. Such constraints typically stem from requirements (or assumptions) on the SUV inputs and its operational environment as well as from the enforcement of additional conditions aiming at, e.g., prioritising the (often extremely long) verification activity, by, e.g., focusing on scenarios explicitly exercising selected requirements, or avoiding </i>vacuity</i> in their satisfaction. In this setting, the possibility to efficiently sample at random (with a known distribution, e.g., uniformly) within, or to efficiently enumerate (possibly in a uniformly random order) scenarios among those satisfying all the given constraints is a key enabler for the practical viability of the verification process, e.g., via simulation-based statistical model checking. Unfortunately, in case of non-trivial combinations of constraints, iterative approaches like Markovian random walks in the space of sequences of inputs in general fail in extracting scenarios according to a given distribution (e.g., uniformly), and can be very inefficient to produce at all scenarios that are both legal (with respect to SUV assumptions) and of interest (with respect to the additional constraints). For example, in our case studies, up to 91% of the scenarios generated using such iterative approaches would need to be neglected. In this article, we show how, given a set of constraints on the input scenarios succinctly defined by multiple finite memory monitors, a data structure (scenario generator) can be synthesised, from which any-horizon scenarios satisfying the input constraints can be efficiently extracted by (possibly uniform) random sampling or (randomised) enumeration. Our approach enables seamless support to virtually all simulation-based approaches to CPS verification, ranging from simple random testing to statistical model checking and formal (i.e., exhaustive) verification, when a suitable bound on the horizon or an iterative horizon enlargement strategy is defined, as in the spirit of bounded model checking. | ||||
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| ISSN | 1939-3520 | ISBN | Medium | ||
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| Notes | To appear | Approved | no | ||
| Call Number | MCLab @ davi @ ref9527998 | Serial | 191 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Synthesizing Control Software from Boolean Relations | Type | Journal Article | ||
| Year | 2012 | Publication | International Journal on Advances in Software | Abbreviated Journal | Intern. Journal on Advances in SW |
| Volume | vol. 5, nr 3&4 | Issue | Pages | 212-223 | |
| Keywords | Control Software Synthesis; Embedded Systems; Model Checking | ||||
| Abstract | Many software as well digital hardware automatic
synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately, the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper, we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a worst case execution time linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. Moreover, a formal proof of the proposed algorithm correctness is also shown. Finally, we present experimental results showing effectiveness of the proposed algorithm. |
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| Publisher | IARIA | Place of Publication | Editor | Luigi Lavazza | |
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| ISSN | 1942-2628 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ melatti @ | Serial | 108 | ||
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| Author | Della Penna, Giuseppe; Tofani, Alberto; Pecorari, Marcello; Raparelli, Orazio; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico | ||||
| Title | A Case Study on Automated Generation of Integration Tests | Type | Conference Article | ||
| Year | 2006 | Publication | Fdl | Abbreviated Journal | |
| Volume | Issue | Pages | 278-284 | ||
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| Publisher | Ecsi | Place of Publication | Editor | ||
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| ISSN | 978-3-00-019710-9 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dtprimt06 | Serial | 27 | ||
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| Author | Cavaliere, Federico; Mari, Federico; Melatti, Igor; Minei, Giovanni; Salvo, Ivano; Tronci, Enrico; Verzino, Giovanni; Yushtein, Yuri | ||||
| Title | Model Checking Satellite Operational Procedures | Type | Conference Article | ||
| Year | 2011 | Publication | DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. San Anton, Malta, EuroSpace. | Abbreviated Journal | |
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| Abstract | We present a model checking approach for the automatic verification of satellite operational procedures (OPs). Building a model for a complex system as a satellite is a hard task. We overcome this obstruction by using a suitable simulator (SIMSAT) for the satellite. Our approach aims at improving OP quality assurance by automatic exhaustive exploration of all possible simulation scenarios. Moreover, our solution decreases OP verification costs by using a model checker (CMurphi) to automatically drive the simulator. We model OPs as user-executed programs observing the simulator telemetries and sending telecommands to the simulator. In order to assess feasibility of our approach we present experimental results on a simple meaningful scenario. Our results show that we can save up to 90% of verification time. | ||||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dasia11 | Serial | 13 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | From Boolean Relations to Control Software | Type | Conference Article | ||
| Year | 2011 | Publication | Proceedings of ICSEA 2011, The Sixth International Conference on Software Engineering Advances | Abbreviated Journal | |
| Volume | Issue | Pages | 528-533 | ||
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| Abstract | Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. | ||||
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| Publisher | ThinkMind | Place of Publication | Editor | ||
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| ISSN | 978-1-61208-165-6 | ISBN | Medium | ||
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| Notes | Best Paper Award | Approved | yes | ||
| Call Number | Sapienza @ mari @ icsea11 | Serial | 14 | ||
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| Author | Bobbio, Andrea; Ciancamerla, Ester; Di Blasi, Saverio; Iacomini, Alessandro; Mari, Federico; Melatti, Igor; Minichino, Michele; Scarlatti, Alessandro; Tronci, Enrico; Terruggia, Roberta; Zendri, Emilio | ||||
| Title | Risk analysis via heterogeneous models of SCADA interconnecting Power Grids and Telco networks | Type | Conference Article | ||
| Year | 2009 | Publication | Proceedings of Fourth International Conference on Risks and Security of Internet and Systems (CRiSIS) | Abbreviated Journal | |
| Volume | Issue | Pages | 90-97 | ||
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| Abstract | The automation of power grids by means of supervisory control and data acquisition (SCADA) systems has led to an improvement of power grid operations and functionalities but also to pervasive cyber interdependencies between power grids and telecommunication networks. Many power grid services are increasingly depending upon the adequate functionality of SCADA system which in turn strictly depends on the adequate functionality of its communication infrastructure. We propose to tackle the SCADA risk analysis by means of different and heterogeneous modeling techniques and software tools. We demonstrate the applicability of our approach through a case study on an actual SCADA system for an electrical power distribution grid. The modeling techniques we discuss aim at providing a probabilistic dependability analysis, followed by a worst case analysis in presence of malicious attacks and a real-time performance evaluation. | ||||
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| Area | Expedition | Conference | Fourth International Conference on Risks and Security of Internet and Systems (CRiSIS) | ||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ crisis09 | Serial | 17 | ||
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| Author | Mazzini, Silvia; Puri, Stefano; Mari, Federico; Melatti, Igor; Tronci, Enrico | ||||
| Title | Formal Verification at System Level | Type | Conference Article | ||
| Year | 2009 | Publication | In: DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. Instanbul, Turkey, EuroSpace | Abbreviated Journal | |
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| Abstract | System Level Analysis calls for a language comprehensible to experts with different background and yet precise enough to support meaningful analyses. SysML is emerging as an effective balance between such conflicting goals. In this paper we outline some the results obtained as for SysML based system level functional formal verification by an ESA/ESTEC study, with a collaboration among INTECS and La Sapienza University of Roma. The study focuses on SysML based system level functional requirements techniques. | ||||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dasia09 | Serial | 20 | ||
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| Author | Alimguzhin, V.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E. | ||||
| Title | Linearising Discrete Time Hybrid Systems | Type | Journal Article | ||
| Year | 2017 | Publication | IEEE Transactions on Automatic Control | Abbreviated Journal | |
| Volume | 62 | Issue | 10 | Pages | 5357-5364 |
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| Abstract | Model Based Design approaches for embedded systems aim at generating correct-by-construction control software, guaranteeing that the closed loop system (controller and plant) meets given system level formal specifications. This technical note addresses control synthesis for safety and reachability properties of possibly non-linear discrete time hybrid systems. By means of syntactical transformations that require non-linear terms to be Lipschitz continuous functions, we over-approximate non-linear dynamics with a linear system whose controllers are guaranteed to be controllers of the original system. We evaluate performance of our approach on meaningful control synthesis benchmarks, also comparing it to a state-of-the-art tool. | ||||
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| ISSN | 0018-9286 | ISBN | Medium | ||
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| Notes | Approved | no | |||
| Call Number | Sapienza @ mari @ ref7902199 | Serial | 164 | ||
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| Author | Intrigila, Benedetto; Magazzeni, Daniele; Melatti, Igor; Tronci, Enrico | ||||
| Title | A Model Checking Technique for the Verification of Fuzzy Control Systems | Type | Conference Article | ||
| Year | 2005 | Publication | CIMCA '05: Proceedings of the International Conference on Computational Intelligence for Modelling, Control and Automation and International Conference on Intelligent Agents, Web Technologies and Internet Commerce Vol-1 (CIMCA-IAWTIC'06) | Abbreviated Journal | |
| Volume | Issue | Pages | 536-542 | ||
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| Abstract | Fuzzy control is well known as a powerful technique for designing and realizing control systems. However, statistical evidence for their correct behavior may be not enough, even when it is based on a large number of samplings. In order to provide a more systematic verification process, the cell-to-cell mapping technology has been used in a number of cases as a verification tool for fuzzy control systems and, more recently, to assess their optimality and robustness. However, cell-to-cell mapping is typically limited in the number of cells it can explore. To overcome this limitation, in this paper we show how model checking techniques may be instead used to verify the correct behavior of a fuzzy control system. To this end, we use a modified version of theMurphi verifier, which ease the modeling phase by allowing to use finite precision real numbers and external C functions. In this way, also already designed simulators may be used for the verification phase. With respect to the cell mapping technique, our approach appears to be complementary; indeed, it explores a much larger number of states, at the cost of being less informative on the global dynamic of the system. | ||||
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| Publisher | IEEE Computer Society | Place of Publication | Washington, DC, USA | Editor | |
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| ISSN | 0-7695-2504-0-01 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Immt05 | Serial | 75 | ||
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| Author | Brizzolari, Francesco; Melatti, Igor; Tronci, Enrico; Della Penna, Giuseppe | ||||
| Title | Disk Based Software Verification via Bounded Model Checking | Type | Conference Article | ||
| Year | 2007 | Publication | APSEC '07: Proceedings of the 14th Asia-Pacific Software Engineering Conference | Abbreviated Journal | |
| Volume | Issue | Pages | 358-365 | ||
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| Abstract | One of the most successful approach to automatic software verification is SAT based bounded model checking (BMC). One of the main factors limiting the size of programs that can be automatically verified via BMC is the huge number of clauses that the backend SAT solver has to process. In fact, because of this, the SAT solver may easily run out of RAM. We present two disk based algorithms that can considerably decrease the number of clauses that a BMC backend SAT solver has to process in RAM. Our experimental results show that using our disk based algorithms we can automatically verify programs that are out of reach for RAM based BMC. | ||||
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| Publisher | IEEE Computer Society | Place of Publication | Washington, DC, USA | Editor | |
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| ISSN | 0-7695-3057-5 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Bmtd07 | Serial | 76 | ||
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