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Author | Alimguzhin, V.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E. | ||||
Title | Linearising Discrete Time Hybrid Systems | Type | Journal Article | ||
Year | 2017 | Publication | IEEE Transactions on Automatic Control | Abbreviated Journal | |
Volume | 62 | Issue | 10 | Pages | 5357-5364 |
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Abstract | Model Based Design approaches for embedded systems aim at generating correct-by-construction control software, guaranteeing that the closed loop system (controller and plant) meets given system level formal specifications. This technical note addresses control synthesis for safety and reachability properties of possibly non-linear discrete time hybrid systems. By means of syntactical transformations that require non-linear terms to be Lipschitz continuous functions, we over-approximate non-linear dynamics with a linear system whose controllers are guaranteed to be controllers of the original system. We evaluate performance of our approach on meaningful control synthesis benchmarks, also comparing it to a state-of-the-art tool. | ||||
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ISSN | 0018-9286 | ISBN | Medium | ||
Area | Expedition | Conference | |||
Notes | Approved | no | |||
Call Number | Sapienza @ mari @ ref7902199 | Serial | 164 | ||
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Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
Title | Linear Constraints as a Modeling Language for Discrete Time Hybrid Systems | Type | Conference Article | ||
Year | 2012 | Publication | Proceedings of ICSEA 2012, The Seventh International Conference on Software Engineering Advances | Abbreviated Journal | |
Volume | Issue | Pages | 664-671 | ||
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Publisher | ThinkMind | Place of Publication | Editor | ||
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Notes | Approved | yes | |||
Call Number | Sapienza @ mari @ icsea12 | Serial | 98 | ||
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Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
Title | Linear Constraints and Guarded Predicates as a Modeling Language for Discrete Time Hybrid Systems | Type | Journal Article | ||
Year | 2013 | Publication | International Journal on Advances in Software | Abbreviated Journal | Intern. Journal on Advances in SW |
Volume | vol. 6, nr 1&2 | Issue | Pages | 155-169 | |
Keywords | Model-based software design; Linear predicates; Hybrid systems | ||||
Abstract | Model based design is particularly appealing in
software based control systems (e.g., embedded software) design, since in such a case system level specifications are much easier to define than the control software behavior itself. In turn, model based design of embedded systems requires modeling both continuous subsystems (typically, the plant) as well as discrete subsystems (the controller). This is typically done using hybrid systems. Mixed Integer Linear Programming (MILP) based abstraction techniques have been successfully applied to automatically synthesize correct-by-construction control software for discrete time linear hybrid systems, where plant dynamics is modeled as a linear predicate over state, input, and next state variables. Unfortunately, MILP solvers require such linear predicates to be conjunctions of linear constraints, which is not a natural way of modeling hybrid systems. In this paper we show that, under the hypothesis that each variable ranges over a bounded interval, any linear predicate built upon conjunction and disjunction of linear constraints can be automatically translated into an equivalent conjunctive predicate. Since variable bounds play a key role in this translation, our algorithm includes a procedure to compute all implicit variable bounds of the given linear predicate. Furthermore, we show that a particular form of linear predicates, namely guarded predicates, are a natural and powerful language to succinctly model discrete time linear hybrid systems dynamics. Finally, we experimentally show the feasibility of our approach on an important and challenging case study taken from the literature, namely the multi-input Buck DC-DC Converter. As an example, the guarded predicate that models (with 57 constraints) a 6-inputs Buck DC-DC Converter is translated in a conjunctive predicate (with 102 linear constraints) in about 40 minutes. |
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Publisher | IARIA | Place of Publication | Editor | Luigi Lavazza | |
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Series Volume | Series Issue | Edition | |||
ISSN | 1942-2628 | ISBN | Medium | ||
Area | Expedition | Conference | |||
Notes | Approved | yes | |||
Call Number | Sapienza @ melatti @ | Serial | 115 | ||
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Author | Della Penna, Giuseppe; Di Marco, Antinisca; Intrigila, Benedetto; Melatti, Igor; Pierantonio, Alfonso | ||||
Title | Interoperability mapping from XML schemas to ER diagrams | Type | Journal Article | ||
Year | 2006 | Publication | Data Knowl. Eng. | Abbreviated Journal | |
Volume | 59 | Issue | 1 | Pages | 166-188 |
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Abstract | The eXtensible Markup Language (XML) is a de facto standard on the Internet and is now being used to exchange a variety of data structures. This leads to the problem of efficiently storing, querying and retrieving a great amount of data contained in XML documents. Unfortunately, XML data often need to coexist with historical data. At present, the best solution for storing XML into pre-existing data structures is to extract the information from the XML documents and adapt it to the data structures’ logical model (e.g., the relational model of a DBMS). In this paper, we introduce a technique called Xere (XML entity–relationship exchange) to assist the integration of XML data with other data sources. To this aim, we present an algorithm that maps XML schemas into entity–relationship diagrams, discuss its soundness and completeness and show its implementation in XSLT. | ||||
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Publisher | Elsevier Science Publishers B. V. | Place of Publication | Amsterdam, The Netherlands, The Netherlands | Editor | |
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ISSN | 0169-023x | ISBN | Medium | ||
Area | Expedition | Conference | |||
Notes | Approved | yes | |||
Call Number | Sapienza @ mari @ Ddimp06 | Serial | 77 | ||
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Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
Title | Integrating RAM and Disk Based Verification within the Mur$\varphi$ Verifier | Type | Conference Article | ||
Year | 2003 | Publication | Correct Hardware Design and Verification Methods, 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, 2003, Proceedings | Abbreviated Journal | |
Volume | Issue | Pages | 277-282 | ||
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Abstract | We present a verification algorithm that can automatically switch from RAM based verification to disk based verification without discarding the work done during the RAM based verification phase. This avoids having to choose beforehand the proper verification algorithm. Our experimental results show that typically our integrated algorithm is as fast as (sometime faster than) the fastest of the two base (i.e. RAM based and disk based) verification algorithms. | ||||
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Publisher | Springer | Place of Publication | Editor | Geist, D.; Tronci, E. | |
Language | Summary Language | Original Title | |||
Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
Series Volume | 2860 | Series Issue | Edition | ||
ISSN | 3-540-20363-X | ISBN | Medium | ||
Area | Expedition | Conference | |||
Notes | Approved | yes | |||
Call Number | Sapienza @ mari @ DIMTZ03a | Serial | 85 | ||
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Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
Title | From Boolean Relations to Control Software | Type | Conference Article | ||
Year | 2011 | Publication | Proceedings of ICSEA 2011, The Sixth International Conference on Software Engineering Advances | Abbreviated Journal | |
Volume | Issue | Pages | 528-533 | ||
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Abstract | Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. | ||||
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Publisher | ThinkMind | Place of Publication | Editor | ||
Language | Summary Language | Original Title | |||
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ISSN | 978-1-61208-165-6 | ISBN | Medium | ||
Area | Expedition | Conference | |||
Notes | Best Paper Award | Approved | yes | ||
Call Number | Sapienza @ mari @ icsea11 | Serial | 14 | ||
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Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
Title | From Boolean Functional Equations to Control Software | Type | Report | ||
Year | 2011 | Publication | Abbreviated Journal | ||
Volume | abs/1106.0468 | Issue | Pages | ||
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Abstract | Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) at most O(nr), being n = |x| the number of arguments of functions in F and r the number of functions in F. | ||||
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Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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Notes | Approved | yes | |||
Call Number | Sapienza @ mari @ | Serial | 105 | ||
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Author | Mazzini, Silvia; Puri, Stefano; Mari, Federico; Melatti, Igor; Tronci, Enrico | ||||
Title | Formal Verification at System Level | Type | Conference Article | ||
Year | 2009 | Publication | In: DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. Instanbul, Turkey, EuroSpace | Abbreviated Journal | |
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Abstract | System Level Analysis calls for a language comprehensible to experts with different background and yet precise enough to support meaningful analyses. SysML is emerging as an effective balance between such conflicting goals. In this paper we outline some the results obtained as for SysML based system level functional formal verification by an ESA/ESTEC study, with a collaboration among INTECS and La Sapienza University of Roma. The study focuses on SysML based system level functional requirements techniques. | ||||
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Notes | Approved | yes | |||
Call Number | Sapienza @ mari @ Dasia09 | Serial | 20 | ||
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Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
Title | Finite Horizon Analysis of Stochastic Systems with the Mur$\varphi$ Verifier | Type | Conference Article | ||
Year | 2003 | Publication | Theoretical Computer Science, 8th Italian Conference, ICTCS 2003, Bertinoro, Italy, October 13-15, 2003, Proceedings | Abbreviated Journal | |
Volume | Issue | Pages | 58-71 | ||
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Abstract | Many reactive systems are actually Stochastic Processes. Automatic analysis of such systems is usually very difficult thus typically one simplifies the analysis task by using simulation or by working on a simplified model (e.g. a Markov Chain). We present a Finite Horizon Probabilistic Model Checking approach which essentially can handle the same class of stochastic processes of a typical simulator. This yields easy modeling of the system to be analyzed together with formal verification capabilities. Our approach is based on a suitable disk based extension of the Mur$\varphi$ verifier. Moreover we present experimental results showing effectiveness of our approach. | ||||
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Publisher | Springer | Place of Publication | Editor | Blundo, C.; Laneve, C. | |
Language | Summary Language | Original Title | |||
Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
Series Volume | 2841 | Series Issue | Edition | ||
ISSN | 3-540-20216-1 | ISBN | Medium | ||
Area | Expedition | Conference | |||
Notes | Approved | yes | |||
Call Number | Sapienza @ mari @ DIMTZ03c | Serial | 90 | ||
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Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
Title | Finite Horizon Analysis of Markov Chains with the Mur$\varphi$ Verifier | Type | Conference Article | ||
Year | 2003 | Publication | Correct Hardware Design and Verification Methods, 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, 2003, Proceedings | Abbreviated Journal | |
Volume | Issue | Pages | 394-409 | ||
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Abstract | In this paper we present an explicit disk based verification algorithm for Probabilistic Systems defining discrete time/finite state Markov Chains. Given a Markov Chain and an integer k (horizon), our algorithm checks whether the probability of reaching an error state in at most k steps is below a given threshold. We present an implementation of our algorithm within a suitable extension of the Mur$\varphi$ verifier. We call the resulting probabilistic model checker FHP-Mur$\varphi$ (Finite Horizon Probabilistic Mur$\varphi$). We present experimental results comparing FHP-Mur$\varphi$ with (a finite horizon subset of) PRISM, a state-of-the-art symbolic model checker for Markov Chains. Our experimental results show that FHP-Mur$\varphi$ can handle systems that are out of reach for PRISM, namely those involving arithmetic operations on the state variables (e.g. hybrid systems). | ||||
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Publisher | Springer | Place of Publication | Editor | Geist, D.; Tronci, E. | |
Language | Summary Language | Original Title | |||
Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
Series Volume | 2860 | Series Issue | Edition | ||
ISSN | 3-540-20363-X | ISBN | Medium | ||
Area | Expedition | Conference | |||
Notes | Approved | yes | |||
Call Number | Sapienza @ mari @ Dimtz03 | Serial | 84 | ||
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