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| Author | Tronci, Enrico | ||||
| Title | Defining Data Structures via Böhm-Out | Type | Journal Article | ||
| Year | 1995 | Publication | J. Funct. Program. | Abbreviated Journal | |
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5 | Issue | 1 | Pages | 51-64 |
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| Abstract | We show that any recursively enumerable subset of a data structure can be regarded as the solution set to a B??hm-out problem. | ||||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ jfp95 | Serial | 57 | ||
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| Author | Kuijpers, Ed; Carotenuto, Luigi; Malapert, Jean-Cristophe; Markov-Vetter, Daniela; Melatti, Igor; Orlandini, Andrea; Pinchuk, Ranni | ||||
| Title | Collaboration on ISS Experiment Data and Knowledge Representation | Type | Conference Article | ||
| Year | 2012 | Publication | Proc. of IAC 2012 | Abbreviated Journal | |
| Volume |
D.5.11 | Issue | Pages | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ melatti @ | Serial | 107 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Synthesizing Control Software from Boolean Relations | Type | Journal Article | ||
| Year | 2012 | Publication | International Journal on Advances in Software | Abbreviated Journal | Intern. Journal on Advances in SW |
| Volume |
vol. 5, nr 3&4 | Issue | Pages | 212-223 | |
| Keywords | Control Software Synthesis; Embedded Systems; Model Checking | ||||
| Abstract | Many software as well digital hardware automatic
synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately, the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper, we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a worst case execution time linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. Moreover, a formal proof of the proposed algorithm correctness is also shown. Finally, we present experimental results showing effectiveness of the proposed algorithm. |
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| Publisher | IARIA | Place of Publication | Editor | Luigi Lavazza | |
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| Series Volume | Series Issue | Edition | |||
| ISSN | 1942-2628 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ melatti @ | Serial | 108 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Exploiting Transition Locality in Automatic Verification of Finite State Concurrent Systems | Type | Journal Article | ||
| Year | 2004 | Publication | Sttt | Abbreviated Journal | |
| Volume |
6 | Issue | 4 | Pages | 320-341 |
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| Abstract | In this paper we show that statistical properties of the transition graph of a system to be verified can be exploited to improve memory or time performances of verification algorithms. We show experimentally that protocols exhibit transition locality. That is, with respect to levels of a breadth-first state space exploration, state transitions tend to be between states belonging to close levels of the transition graph. We support our claim by measuring transition locality for the set of protocols included in the Mur$\varphi$ verifier distribution. We present a cache-based verification algorithm that exploits transition locality to decrease memory usage and a disk-based verification algorithm that exploits transition locality to decrease disk read accesses, thus reducing the time overhead due to disk usage. Both algorithms have been implemented within the Mur$\varphi$ verifier. Our experimental results show that our cache-based algorithm can typically save more than 40% of memory with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction, whereas our disk-based verification algorithm is typically more than ten times faster than a previously proposed disk-based verification algorithm and, even when using 10% of the memory needed to complete verification, it is only between 40 and 530% (300% on average) slower than (RAM) Mur$\varphi$ with enough memory to complete the verification task at hand. Using just 300 MB of memory our disk-based Mur$\varphi$ was able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 GB of memory using standard Mur$\varphi$. | ||||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ DIMTZ04j | Serial | 91 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Linear Constraints and Guarded Predicates as a Modeling Language for Discrete Time Hybrid Systems | Type | Journal Article | ||
| Year | 2013 | Publication | International Journal on Advances in Software | Abbreviated Journal | Intern. Journal on Advances in SW |
| Volume |
vol. 6, nr 1&2 | Issue | Pages | 155-169 | |
| Keywords | Model-based software design; Linear predicates; Hybrid systems | ||||
| Abstract | Model based design is particularly appealing in
software based control systems (e.g., embedded software) design, since in such a case system level specifications are much easier to define than the control software behavior itself. In turn, model based design of embedded systems requires modeling both continuous subsystems (typically, the plant) as well as discrete subsystems (the controller). This is typically done using hybrid systems. Mixed Integer Linear Programming (MILP) based abstraction techniques have been successfully applied to automatically synthesize correct-by-construction control software for discrete time linear hybrid systems, where plant dynamics is modeled as a linear predicate over state, input, and next state variables. Unfortunately, MILP solvers require such linear predicates to be conjunctions of linear constraints, which is not a natural way of modeling hybrid systems. In this paper we show that, under the hypothesis that each variable ranges over a bounded interval, any linear predicate built upon conjunction and disjunction of linear constraints can be automatically translated into an equivalent conjunctive predicate. Since variable bounds play a key role in this translation, our algorithm includes a procedure to compute all implicit variable bounds of the given linear predicate. Furthermore, we show that a particular form of linear predicates, namely guarded predicates, are a natural and powerful language to succinctly model discrete time linear hybrid systems dynamics. Finally, we experimentally show the feasibility of our approach on an important and challenging case study taken from the literature, namely the multi-input Buck DC-DC Converter. As an example, the guarded predicate that models (with 57 constraints) a 6-inputs Buck DC-DC Converter is translated in a conjunctive predicate (with 102 linear constraints) in about 40 minutes. |
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| Publisher | IARIA | Place of Publication | Editor | Luigi Lavazza | |
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| ISSN | 1942-2628 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ melatti @ | Serial | 115 | ||
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| Author | Tronci, Enrico | ||||
| Title | Introductory Paper | Type | Journal Article | ||
| Year | 2006 | Publication | Sttt | Abbreviated Journal | |
| Volume |
8 | Issue | 4-5 | Pages | 355-358 |
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| Abstract | In today’s competitive market designing of digital systems (hardware as well as software) faces tremendous challenges. In fact, notwithstanding an ever decreasing project budget, time to market and product lifetime, designers are faced with an ever increasing system complexity and customer expected quality. The above situation calls for better and better formal verification techniques at all steps of the design flow. This special issue is devoted to publishing revised versions of contributions first presented at the 12th Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) held 21–24 October 2003 in L’Aquila, Italy. Authors of well regarded papers from CHARME’03 were invited to submit to this special issue. All papers included here have been suitably extended and have undergone an independent round of reviewing. | ||||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ sttt06 | Serial | 30 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Finite horizon analysis of Markov Chains with the Mur$\varphi$ verifier | Type | Journal Article | ||
| Year | 2006 | Publication | Int. J. Softw. Tools Technol. Transf. | Abbreviated Journal | |
| Volume |
8 | Issue | 4 | Pages | 397-409 |
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| Abstract | In this paper we present an explicit disk-based verification algorithm for Probabilistic Systems defining discrete time/finite state Markov Chains. Given a Markov Chain and an integer k (horizon), our algorithm checks whether the probability of reaching an error state in at most k steps is below a given threshold. We present an implementation of our algorithm within a suitable extension of the Mur$\varphi$ verifier. We call the resulting probabilistic model checker FHP-Mur$\varphi$ (Finite Horizon Probabilistic Mur$\varphi$). We present experimental results comparing FHP-Mur$\varphi$ with (a finite horizon subset of) PRISM, a state-of-the-art symbolic model checker for Markov Chains. Our experimental results show that FHP-Mur$\varphi$ can handle systems that are out of reach for PRISM, namely those involving arithmetic operations on the state variables (e.g. hybrid systems). | ||||
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| Publisher | Springer-Verlag | Place of Publication | Berlin, Heidelberg | Editor | |
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| ISSN | 1433-2779 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dimtz06 | Serial | 78 | ||
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| Author | Hayes, B. P. ; Melatti, I.; Mancini, T.; Prodanovic, M.; Tronci, E. | ||||
| Title | Residential Demand Management using Individualised Demand Aware Price Policies | Type | Journal Article | ||
| Year | 2017 | Publication | IEEE Transactions On Smart Grid | Abbreviated Journal | |
| Volume |
8 | Issue | 3 | Pages | 1284-1294 |
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| Notes | Approved | no | |||
| Call Number | MCLab @ davi @ | Serial | 157 | ||
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| Author | Leeners, B.; Krueger, T.H.C.; Geraedts, K.; Tronci, E.; Mancini, T.; Egli, M.; Roeblitz, S.; Saleh, L.; Spanaus, K.; Schippert, C.; Zhang, Y.; Ille, F. | ||||
| Title | Associations Between Natural Physiological and Supraphysiological Estradiol Levels and Stress Perception | Type | Journal Article | ||
| Year | 2019 | Publication | Frontiers in Psychology | Abbreviated Journal | |
| Volume |
10 | Issue | Pages | 1296 | |
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| Abstract | Stress is a risk factor for impaired general, mental and reproductive health. The role of physiological and supraphysiological estradiol concentrations in stress perception and stress processing is less well understood. We therefore, conducted a prospective observational study to investigate the association between estradiol, stress perception and stress-related cognitive performance within serial measurements either during the natural menstrual cycle or during fertility treatment, where estradiol levels are strongly above the physiological level of a natural cycle and consequently, represent a good model to study dose-dependent effects of estradiol. Data from 44 women receiving in vitro fertilization at the Department of Reproductive Endocrinology in Zurich, Switzerland was compared to data from 88 women with measurements during their natural menstrual cycle. The german version of the Perceived Stress Questionnaire (PSQ) and the Cognitive Bias Test (CBT), in which cognitive performance is tested under time stress were used to evaluate subjective and functional aspects of stress. Estradiol levels were investigated at four different time points during the menstrual cycle and at two different time points during a fertility treatment. Cycle phase were associated with PSQ worry and cognitive bias in normally cycling women, but different phases of fertility treatment were not associated with subjectively perceived stress and stress-related cognitive bias. PSQ lack of joy and PSQ demands related to CBT in women receiving fertility treatment but not in women with a normal menstrual cycle. Only strong changes of the estradiol level during fertility treatment were weakly associated with CBT, but not with subjectively experienced stress. Our research emphasises the multidimensional character of stress and the necessity to adjust stress research to the complex nature of stress perception and processing. Infertility is associated with an increased psychological burden in patients. However, not all phases of the process to overcome infertility do significantly increase patient stress levels. Also, research on the psychological burden of infertility should consider that stress may vary during the different phases of fertility treatment. | ||||
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| ISSN | 1664-1078 | ISBN | Medium | ||
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| Notes | Approved | no | |||
| Call Number | MCLab @ davi @ ref10.3389/fpsyg.2019.01296 | Serial | 178 | ||
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| Author | Melatti, Igor; Palmer, Robert; Sawaya, Geoffrey; Yang, Yu; Kirby, Robert Mike; Gopalakrishnan, Ganesh | ||||
| Title | Parallel and distributed model checking in Eddy | Type | Journal Article | ||
| Year | 2009 | Publication | Int. J. Softw. Tools Technol. Transf. | Abbreviated Journal | |
| Volume |
11 | Issue | 1 | Pages | 13-25 |
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| Abstract | Model checking of safety properties can be scaled up by pooling the CPU and memory resources of multiple computers. As compute clusters containing 100s of nodes, with each node realized using multi-core (e.g., 2) CPUs will be widespread, a model checker based on the parallel (shared memory) and distributed (message passing) paradigms will more efficiently use the hardware resources. Such a model checker can be designed by having each node employ two shared memory threads that run on the (typically) two CPUs of a node, with one thread responsible for state generation, and the other for efficient communication, including (1) performing overlapped asynchronous message passing, and (2) aggregating the states to be sent into larger chunks in order to improve communication network utilization. We present the design details of such a novel model checking architecture called Eddy. We describe the design rationale, details of how the threads interact and yield control, exchange messages, as well as detect termination. We have realized an instance of this architecture for the Murphi modeling language. Called Eddy_Murphi, we report its performance over the number of nodes as well as communication parameters such as those controlling state aggregation. Nearly linear reduction of compute time with increasing number of nodes is observed. Our thread task partition is done in such a way that it is modular, easy to port across different modeling languages, and easy to tune across a variety of platforms. | ||||
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| Publisher | Springer-Verlag | Place of Publication | Berlin, Heidelberg | Editor | |
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| ISSN | 1433-2779 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Mpsykg09 | Serial | 80 | ||
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