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Author (up) Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E. pdf  url
doi  openurl
  Title An Efficient Algorithm for Network Vulnerability Analysis Under Malicious Attacks Type Conference Article
  Year 2018 Publication Foundations of Intelligent Systems – 24th International Symposium, ISMIS 2018, Limassol, Cyprus, October 29-31, 2018, Proceedings Abbreviated Journal  
  Volume Issue Pages 302-312  
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  Notes Best Paper Approved no  
  Call Number MCLab @ davi @ DBLP:conf/ismis/ManciniMMST18 Serial 176  
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Author (up) Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E.; Gruber, J.; Hayes, B.; Prodanovic, M.; Elmegaard, L. pdf  doi
openurl 
  Title Parallel Statistical Model Checking for Safety Verification in Smart Grids Type Conference Article
  Year 2018 Publication 2018 IEEE International Conference on Communications, Control, and Computing Technologies for Smart Grids (SmartGridComm) Abbreviated Journal  
  Volume Issue Pages 1-6  
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  Notes Approved no  
  Call Number MCLab @ davi @ mancini-etal:2018:smartgridcomm Serial 170  
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Author (up) Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E.; Gruber, J.K.; Hayes, B.; Prodanovic, M.; Elmegaard, L. pdf  doi
openurl 
  Title User Flexibility Aware Price Policy Synthesis for Smart Grids Type Conference Article
  Year 2015 Publication Digital System Design (DSD), 2015 Euromicro Conference on Abbreviated Journal  
  Volume Issue Pages 478-485  
  Keywords Contracts; Current measurement; Load management; Power demand; Power measurement; State estimation; Substations; Grid State Estimation; Peak Shaving; Policy Robustness Verification; Price Policy Synthesis  
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  Notes Approved no  
  Call Number Sapienza @ preissler @ Mancini_etal2015_3 Serial 136  
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Author (up) Mancini, Toni ; Mari, Federico ; Massini, Annalisa; Melatti, Igor; Tronci, Enrico pdf  doi
openurl 
  Title System Level Formal Verification via Distributed Multi-Core Hardware in the Loop Simulation Type Conference Article
  Year 2014 Publication Proc. of the 22nd Euromicro International Conference on Parallel, Distributed and Network-Based Processing Abbreviated Journal Euromicro International Conference on Parallel, Distributed and Network-Based Processing  
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  Publisher IEEE Computer Society Place of Publication Editor  
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  Area Expedition Conference  
  Notes Approved no  
  Call Number Sapienza @ melatti @ Serial 118  
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Author (up) Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Merli, Fabio; Tronci, Enrico pdf  doi
isbn  openurl
  Title System Level Formal Verification via Model Checking Driven Simulation Type Conference Article
  Year 2013 Publication Proceedings of the 25th International Conference on Computer Aided Verification. July 13-19, 2013, Saint Petersburg, Russia Abbreviated Journal CAV 2013  
  Volume Issue Pages 296-312  
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  Publisher Springer - Verlag Place of Publication Editor  
  Language Summary Language Original Title  
  Series Editor Series Title Lecture Notes in Computer Science Abbreviated Series Title  
  Series Volume 8044 Series Issue Edition  
  ISSN 0302-9743 ISBN 978-3-642-39798-1 Medium  
  Area Expedition Conference  
  Notes Approved yes  
  Call Number Sapienza @ mari @ Serial 113  
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Author (up) Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico pdf  doi
openurl 
  Title SyLVaaS: System Level Formal Verification as a Service Type Conference Article
  Year 2015 Publication Proceedings of the 23rd Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP 2015), special session on Formal Approaches to Parallel and Distributed Systems (4PAD) Abbreviated Journal  
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  Notes Approved no  
  Call Number MCLab @ davi @ Serial 123  
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Author (up) Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico pdf  url
doi  openurl
  Title Simulator Semantics for System Level Formal Verification Type Conference Article
  Year 2015 Publication Proceedings Sixth International Symposium on Games, Automata, Logics and Formal Verification (GandALF 2015), Abbreviated Journal  
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  Notes Approved no  
  Call Number MCLab @ davi @ Serial 125  
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Author (up) Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico pdf  doi
openurl 
  Title Anytime System Level Verification via Random Exhaustive Hardware In The Loop Simulation Type Conference Article
  Year 2014 Publication In Proceedings of 17th EuroMicro Conference on Digital System Design (DSD 2014) Abbreviated Journal  
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  Notes Approved no  
  Call Number MCLab @ davi @ Serial 122  
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Author (up) Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico pdf  url
openurl 
  Title Linear Constraints and Guarded Predicates as a Modeling Language for Discrete Time Hybrid Systems Type Journal Article
  Year 2013 Publication International Journal on Advances in Software Abbreviated Journal Intern. Journal on Advances in SW  
  Volume vol. 6, nr 1&2 Issue Pages 155-169  
  Keywords Model-based software design; Linear predicates; Hybrid systems  
  Abstract Model based design is particularly appealing in
software based control systems (e.g., embedded
software) design, since in such a case system
level specifications are much easier to define
than the control software behavior itself. In
turn, model based design of embedded systems
requires modeling both continuous subsystems
(typically, the plant) as well as discrete
subsystems (the controller). This is typically
done using hybrid systems. Mixed Integer Linear
Programming (MILP) based abstraction techniques
have been successfully applied to automatically
synthesize correct-by-construction control
software for discrete time linear hybrid systems,
where plant dynamics is modeled as a linear
predicate over state, input, and next state
variables. Unfortunately, MILP solvers require
such linear predicates to be conjunctions of
linear constraints, which is not a natural way of
modeling hybrid systems. In this paper we show
that, under the hypothesis that each variable
ranges over a bounded interval, any linear
predicate built upon conjunction and disjunction
of linear constraints can be automatically
translated into an equivalent conjunctive
predicate. Since variable bounds play a key role
in this translation, our algorithm includes a
procedure to compute all implicit variable bounds
of the given linear predicate. Furthermore, we
show that a particular form of linear predicates,
namely guarded predicates, are a natural and
powerful language to succinctly model discrete
time linear hybrid systems dynamics. Finally, we
experimentally show the feasibility of our
approach on an important and challenging case
study taken from the literature, namely the
multi-input Buck DC-DC Converter. As an example,
the guarded predicate that models (with 57
constraints) a 6-inputs Buck DC-DC Converter is
translated in a conjunctive predicate (with 102
linear constraints) in about 40 minutes.
 
  Address  
  Corporate Author Thesis  
  Publisher IARIA Place of Publication Editor Luigi Lavazza  
  Language Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 1942-2628 ISBN Medium  
  Area Expedition Conference  
  Notes Approved yes  
  Call Number Sapienza @ melatti @ Serial 115  
Permanent link to this record
 

 
Author (up) Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico pdf  url
openurl 
  Title Synthesizing Control Software from Boolean Relations Type Journal Article
  Year 2012 Publication International Journal on Advances in Software Abbreviated Journal Intern. Journal on Advances in SW  
  Volume vol. 5, nr 3&4 Issue Pages 212-223  
  Keywords Control Software Synthesis; Embedded Systems; Model Checking  
  Abstract Many software as well digital hardware automatic
synthesis methods define the set of
implementations meeting the given system
specifications with a boolean relation K. In
such a context a fundamental step in the software
(hardware) synthesis process is finding effective
solutions to the functional equation defined by
K. This entails finding a (set of) boolean
function(s) F (typically represented using
OBDDs, Ordered Binary Decision Diagrams)
such that: 1) for all x for which K is
satisfiable, K(x, F(x)) = 1 holds; 2) the
implementation of F is efficient with respect
to given implementation parameters such as code
size or execution time. While this problem has
been widely studied in digital hardware synthesis,
little has been done in a software synthesis
context. Unfortunately, the approaches developed
for hardware synthesis cannot be directly used in
a software context. This motivates investigation
of effective methods to solve the above problem
when F has to be implemented with software. In
this paper, we present an algorithm that, from an
OBDD representation for K, generates a C code
implementation for F that has the same size as
the OBDD for F and a worst case execution time
linear in nr, being n = |x| the number of
input arguments for functions in F and r the
number of functions in F. Moreover, a formal
proof of the proposed algorithm correctness is
also shown. Finally, we present experimental
results showing effectiveness of the proposed
algorithm.
 
  Address  
  Corporate Author Thesis  
  Publisher IARIA Place of Publication Editor Luigi Lavazza  
  Language Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 1942-2628 ISBN Medium  
  Area Expedition Conference  
  Notes Approved yes  
  Call Number Sapienza @ melatti @ Serial 108  
Permanent link to this record
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