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Author |
Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
On Model Based Synthesis of Embedded Control Software |
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Conference Article |
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Year |
2012 |
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Proceedings of the 12th International Conference on Embedded Software, EMSOFT 2012, part of the Eighth Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12, 2012 |
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227-236 |
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ACM |
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Ahmed Jerraya and Luca P. Carloni and Florence Maraninchi and John Regehr |
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978-1-4503-1425-1 |
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Techreport version can be found at arxiv.org |
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yes |
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Sapienza @ mari @ emsoft12 |
Serial |
97 |
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Alimguzhin, V.; Mari, F.; Melatti, I.; Tronci, E.; Ebeid, E.; Mikkelsen, S.A.; Jacobsen, R.H.; Gruber, J.K.; Hayes, B.; Huerta, F.; Prodanovic, M. |
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Title |
A Glimpse of SmartHG Project Test-bed and Communication Infrastructure |
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Conference Article |
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2015 |
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Digital System Design (DSD), 2015 Euromicro Conference on |
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225-232 |
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Keywords |
Batteries; Control systems; Databases; Production; Sensors; Servers; Smart grids; Grid State Estimation; Peak Shaving; Policy Robustness Verification; Price Policy Synthesis |
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no |
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Sapienza @ preissler @ Alimguzhin_etal2015 |
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127 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Bounded Probabilistic Model Checking with the Mur$\varphi$ Verifier |
Type |
Conference Article |
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Year |
2004 |
Publication |
Formal Methods in Computer-Aided Design, 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004, Proceedings |
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214-229 |
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In this paper we present an explicit verification algorithm for Probabilistic Systems defining discrete time/finite state Markov Chains. We restrict ourselves to verification of Bounded PCTL formulas (BPCTL), that is, PCTL formulas in which all Until operators are bounded, possibly with different bounds. This means that we consider only paths (system runs) of bounded length. Given a Markov Chain $\cal M$ and a BPCTL formula Φ, our algorithm checks if Φ is satisfied in $\cal M$. This allows to verify important properties, such as reliability in Discrete Time Hybrid Systems. We present an implementation of our algorithm within a suitable extension of the Mur$\varphi$ verifier. We call FHP-Mur$\varphi$ (Finite Horizon Probabilistic Mur$\varphi$) such extension of the Mur$\varphi$ verifier. We give experimental results comparing FHP-Mur$\varphi$ with (a finite horizon subset of) PRISM, a state-of-the-art symbolic model checker for Markov Chains. Our experimental results show that FHP-Mur$\varphi$ can effectively handle verification of BPCTL formulas for systems that are out of reach for PRISM, namely those involving arithmetic operations on the state variables (e.g. hybrid systems). |
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Springer |
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Hu, A.J.; Martin, A.K. |
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Lecture Notes in Computer Science |
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Series Volume |
3312 |
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3-540-23738-0 |
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yes |
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Call Number |
Sapienza @ mari @ Dimtz04 |
Serial |
87 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
Synthesizing Control Software from Boolean Relations |
Type |
Journal Article |
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Year |
2012 |
Publication |
International Journal on Advances in Software |
Abbreviated Journal |
Intern. Journal on Advances in SW |
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Volume |
vol. 5, nr 3&4 |
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Pages |
212-223 |
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Keywords |
Control Software Synthesis; Embedded Systems; Model Checking |
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Abstract |
Many software as well digital hardware automatic
synthesis methods define the set of
implementations meeting the given system
specifications with a boolean relation K. In
such a context a fundamental step in the software
(hardware) synthesis process is finding effective
solutions to the functional equation defined by
K. This entails finding a (set of) boolean
function(s) F (typically represented using
OBDDs, Ordered Binary Decision Diagrams)
such that: 1) for all x for which K is
satisfiable, K(x, F(x)) = 1 holds; 2) the
implementation of F is efficient with respect
to given implementation parameters such as code
size or execution time. While this problem has
been widely studied in digital hardware synthesis,
little has been done in a software synthesis
context. Unfortunately, the approaches developed
for hardware synthesis cannot be directly used in
a software context. This motivates investigation
of effective methods to solve the above problem
when F has to be implemented with software. In
this paper, we present an algorithm that, from an
OBDD representation for K, generates a C code
implementation for F that has the same size as
the OBDD for F and a worst case execution time
linear in nr, being n = |x| the number of
input arguments for functions in F and r the
number of functions in F. Moreover, a formal
proof of the proposed algorithm correctness is
also shown. Finally, we present experimental
results showing effectiveness of the proposed
algorithm. |
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IARIA |
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Editor |
Luigi Lavazza |
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ISSN |
1942-2628 |
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yes |
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Call Number |
Sapienza @ melatti @ |
Serial |
108 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Exploiting Transition Locality in the Disk Based Mur$\varphi$ Verifier |
Type |
Conference Article |
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Year |
2002 |
Publication |
4th International Conference on Formal Methods in Computer-Aided Design (FMCAD) |
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202-219 |
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The main obstruction to automatic verification of Finite State Systems is the huge amount of memory required to complete the verification task (state explosion). This motivates research on distributed as well as disk based verification algorithms. In this paper we present a disk based Breadth First Explicit State Space Exploration algorithm as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm exploits transition locality (i.e. the statistical fact that most transitions lead to unvisited states or to recently visited states) to decrease disk read accesses thus reducing the time overhead due to disk usage. A disk based verification algorithm for Mur$\varphi$ has been already proposed in the literature. To measure the time speed up due to locality exploitation we compared our algorithm with such previously proposed algorithm. Our experimental results show that our disk based verification algorithm is typically more than 10 times faster than such previously proposed disk based verification algorithm. To measure the time overhead due to disk usage we compared our algorithm with RAM based verification using the (standard) Mur$\varphi$ verifier with enough memory to complete the verification task. Our experimental results show that even when using 1/10 of the RAM needed to complete verification, our disk based algorithm is only between 1.4 and 5.3 times (3 times on average) slower than (RAM) Mur$\varphi$ with enough RAM memory to complete the verification task at hand. Using our disk based Mur$\varphi$ we were able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 gigabytes of RAM using RAM based Mur$\varphi$. |
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Springer |
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Portland, OR, USA |
Editor |
Aagaard, M.; O'Leary, J.W. |
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Lecture Notes in Computer Science |
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Series Volume |
2517 |
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3-540-00116-6 |
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yes |
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Call Number |
Sapienza @ mari @ fmcad02 |
Serial |
41 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Synchronized Regular Expressions |
Type |
Journal Article |
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Year |
2002 |
Publication |
Electr. Notes Theor. Comput. Sci. |
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Volume |
62 |
Issue |
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Pages |
195-210 |
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Abstract |
Text manipulation is one of the most common tasks for everyone using a computer. The increasing number of textual information in electronic format that every computer user collects everyday stresses the need of more powerful tools to interact with texts. Indeed, much work has been done to provide nonprogramming tools that can be useful for the most common text manipulation issues. Regular Expressions (RE), introduced by Kleene, are well–known in the formal language theory. RE received several extensions, depending on the application of interest. In almost all the implementations of RE search algorithms (e.g. the egrep [A] UNIX command, or the Perl [17] language pattern matching constructs) we find backreferences (as defind in [1]), i.e. expressions that make reference to the string matched by a previous subexpression. Generally speaking, it seems that all the kinds of synchronizations between subexpressions in a RE can be very useful when interacting with texts. Therefore, we introduce the Synchronized Regular Expressions (SRE) as a derivation of the Regular Expressions. We use SRE to present a formal study of the already known backreferences extension, and of a new extension proposed by us, which we call the synchronized exponents. Moreover, since we are talking about formalisms that should have a practical utility and can be used in the real world, we have the problem of how to present SRE to the final users. Therefore, in this paper we also propose a user–friendly syntax for SRE to be used in implementations of SRE–powered search algorithms. |
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Notes |
TOSCA 2001, Theory of Concurrency, Higher Order Languages and Types |
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yes |
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Call Number |
Sapienza @ mari @ entcs02 |
Serial |
46 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
Synthesis of Quantized Feedback Control Software for Discrete Time Linear Hybrid Systems |
Type |
Conference Article |
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Year |
2010 |
Publication |
Computer Aided Verification |
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180-195 |
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We present an algorithm that given a Discrete Time Linear Hybrid System returns a correct-by-construction software implementation K for a (near time optimal) robust quantized feedback controller for along with the set of states on which K is guaranteed to work correctly (controllable region). Furthermore, K has a Worst Case Execution Time linear in the number of bits of the quantization schema. |
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Springer Berlin / Heidelberg |
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Touili, T.; Cook, B.; Jackson, P. |
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Lecture Notes in Computer Science |
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Series Volume |
6174 |
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yes |
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Call Number |
Sapienza @ mari @ cav2010 |
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16 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
Linear Constraints and Guarded Predicates as a Modeling Language for Discrete Time Hybrid Systems |
Type |
Journal Article |
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Year |
2013 |
Publication |
International Journal on Advances in Software |
Abbreviated Journal |
Intern. Journal on Advances in SW |
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Volume |
vol. 6, nr 1&2 |
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Pages |
155-169 |
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Keywords |
Model-based software design; Linear predicates; Hybrid systems |
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Model based design is particularly appealing in
software based control systems (e.g., embedded
software) design, since in such a case system
level specifications are much easier to define
than the control software behavior itself. In
turn, model based design of embedded systems
requires modeling both continuous subsystems
(typically, the plant) as well as discrete
subsystems (the controller). This is typically
done using hybrid systems. Mixed Integer Linear
Programming (MILP) based abstraction techniques
have been successfully applied to automatically
synthesize correct-by-construction control
software for discrete time linear hybrid systems,
where plant dynamics is modeled as a linear
predicate over state, input, and next state
variables. Unfortunately, MILP solvers require
such linear predicates to be conjunctions of
linear constraints, which is not a natural way of
modeling hybrid systems. In this paper we show
that, under the hypothesis that each variable
ranges over a bounded interval, any linear
predicate built upon conjunction and disjunction
of linear constraints can be automatically
translated into an equivalent conjunctive
predicate. Since variable bounds play a key role
in this translation, our algorithm includes a
procedure to compute all implicit variable bounds
of the given linear predicate. Furthermore, we
show that a particular form of linear predicates,
namely guarded predicates, are a natural and
powerful language to succinctly model discrete
time linear hybrid systems dynamics. Finally, we
experimentally show the feasibility of our
approach on an important and challenging case
study taken from the literature, namely the
multi-input Buck DC-DC Converter. As an example,
the guarded predicate that models (with 57
constraints) a 6-inputs Buck DC-DC Converter is
translated in a conjunctive predicate (with 102
linear constraints) in about 40 minutes. |
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IARIA |
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Editor |
Luigi Lavazza |
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1942-2628 |
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yes |
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Call Number |
Sapienza @ melatti @ |
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115 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Minichino, Michele; Ciancamerla, Ester; Parisse, Andrea; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Automatic Verification of a Turbogas Control System with the Mur$\varphi$ Verifier |
Type |
Conference Article |
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Year |
2003 |
Publication |
Hybrid Systems: Computation and Control, 6th International Workshop, HSCC 2003 Prague, Czech Republic, April 3-5, 2003, Proceedings |
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Pages |
141-155 |
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Automatic analysis of Hybrid Systems poses formidable challenges both from a modeling as well as from a verification point of view. We present a case study on automatic verification of a Turbogas Control System (TCS) using an extended version of the Mur$\varphi$ verifier. TCS is the heart of ICARO, a 2MW Co-generative Electric Power Plant. For large hybrid systems, as TCS is, the modeling effort accounts for a significant part of the whole verification activity. In order to ease our modeling effort we extended the Mur$\varphi$ verifier by importing the C language long double type (finite precision real numbers) into it. We give experimental results on running our extended Mur$\varphi$ on our TCS model. For example using Mur$\varphi$ we were able to compute an admissible range of values for the variation speed of the user demand of electric power to the turbogas. |
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Springer |
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Maler, O.; Pnueli, A. |
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Lecture Notes in Computer Science |
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Series Volume |
2623 |
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3-540-00913-2 |
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yes |
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Call Number |
Sapienza @ mari @ Dimmcptz03 |
Serial |
88 |
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Author |
Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
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Title |
SyLVaaS: System Level Formal Verification as a Service |
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Journal Article |
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Year |
2016 |
Publication |
Fundamenta Informaticae |
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149 |
Issue |
1-2 |
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101-132 |
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MCLab @ davi @ DBLP:journals/fuin/ManciniMMMT16 |
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160 |
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