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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Undecidability of Quantized State Feedback Control for Discrete Time Linear Hybrid Systems | Type | Book Chapter | ||
| Year | 2012 | Publication | Theoretical Aspects of Computing – ICTAC 2012 | Abbreviated Journal | |
| Volume | Issue | Pages | 243-258 | ||
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| Publisher | Springer Berlin Heidelberg | Place of Publication | Editor | Roychoudhury, A.; D'Souza, M. | |
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| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 7521 | Series Issue | Edition | ||
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ISBN | 978-3-642-32942-5 | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Mari2012 | Serial | 99 | ||
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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | A Map-Reduce Parallel Approach to Automatic Synthesis of Control Software | Type | Report | ||
| Year | 2012 | Publication | Abbreviated Journal | ||
| Volume | abs/1210.2276 | Issue | Pages | ||
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| Abstract | Many Control Systems are indeed Software Based Control Systems, i.e. control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of control software.
Available algorithms and tools (e.g., QKS) may require weeks or even months of computation to synthesize control software for large-size systems. This motivates search for parallel algorithms for control software synthesis. In this paper, we present a map-reduce style parallel algorithm for control software synthesis when the controlled system (plant) is modeled as discrete time linear hybrid system. Furthermore we present an MPI-based implementation PQKS of our algorithm. To the best of our knowledge, this is the first parallel approach for control software synthesis. We experimentally show effectiveness of PQKS on two classical control synthesis problems: the inverted pendulum and the multi-input buck DC/DC converter. Experiments show that PQKS efficiency is above 65%. As an example, PQKS requires about 16 hours to complete the synthesis of control software for the pendulum on a cluster with 60 processors, instead of the 25 days needed by the sequential algorithm in QKS. |
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ | Serial | 101 | ||
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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | On Model Based Synthesis of Embedded Control Software | Type | Report | ||
| Year | 2012 | Publication | Abbreviated Journal | ||
| Volume | abs/1207.4474 | Issue | Pages | ||
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| Abstract | Many Embedded Systems are indeed Software Based Control Systems (SBCSs), that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for control software. Given the formal model of a plant as a Discrete Time Linear Hybrid System and the implementation specifications (that is, number of bits in the Analog-to-Digital (AD) conversion) correct-by-construction control software can be automatically generated from System Level Formal Specifications of the closed loop system (that is, safety and liveness requirements), by computing a suitable finite abstraction of the plant.
With respect to given implementation specifications, the automatically generated code implements a time optimal control strategy (in terms of set-up time), has a Worst Case Execution Time linear in the number of AD bits $b$, but unfortunately, its size grows exponentially with respect to $b$. In many embedded systems, there are severe restrictions on the computational resources (such as memory or computational power) available to microcontroller devices. This paper addresses model based synthesis of control software by trading system level non-functional requirements (such us optimal set-up time, ripple) with software non-functional requirements (its footprint). Our experimental results show the effectiveness of our approach: for the inverted pendulum benchmark, by using a quantization schema with 12 bits, the size of the small controller is less than 6% of the size of the time optimal one. |
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ | Serial | 102 | ||
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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Automatic Control Software Synthesis for Quantized Discrete Time Hybrid Systems | Type | Report | ||
| Year | 2012 | Publication | Abbreviated Journal | ||
| Volume | abs/1207.4098 | Issue | Pages | ||
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| Abstract | Many Embedded Systems are indeed Software Based Control Systems, that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of embedded systems control software. This paper addresses control software synthesis for discrete time nonlinear systems. We present a methodology to overapproximate the dynamics of a discrete time nonlinear hybrid system H by means of a discrete time linear hybrid system L(H), in such a way that controllers for L(H) are guaranteed to be controllers for H. We present experimental results on the inverted pendulum, a challenging and meaningful benchmark in nonlinear Hybrid Systems control. | ||||
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ | Serial | 103 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Model Based Synthesis of Control Software from System Level Formal Specifications | Type | Report | ||
| Year | 2013 | Publication | Abbreviated Journal | ||
| Volume | abs/1107.5638 | Issue | Pages | ||
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| Abstract | Many Embedded Systems are indeed Software Based Control Systems, that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of embedded systems control software.
We present an algorithm, along with a tool QKS implementing it, that from a formal model (as a Discrete Time Linear Hybrid System) of the controlled system (plant), implementation specifications (that is, number of bits in the Analog-to-Digital, AD, conversion) and System Level Formal Specifications (that is, safety and liveness requirements for the closed loop system) returns correct-by-construction control software that has a Worst Case Execution Time (WCET) linear in the number of AD bits and meets the given specifications. We show feasibility of our approach by presenting experimental results on using it to synthesize control software for a buck DC-DC converter, a widely used mixed-mode analog circuit, and for the inverted pendulum. |
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ | Serial | 104 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Quantized Feedback Control Software Synthesis from System Level Formal Specifications for Buck DC/DC Converters | Type | Report | ||
| Year | 2011 | Publication | Abbreviated Journal | ||
| Volume | abs/1105.5640 | Issue | Pages | ||
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| Abstract | Many Embedded Systems are indeed Software Based Control Systems (SBCSs), that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of SBCS control software. In previous works we presented an algorithm, along with a tool QKS implementing it, that from a formal model (as a Discrete Time Linear Hybrid System, DTLHS) of the controlled system (plant), implementation specifications (that is, number of bits in the Analog-to-Digital, AD, conversion) and System Level Formal Specifications (that is, safety and liveness requirements for the closed loop system) returns correct-by-construction control software that has a Worst Case Execution Time (WCET) linear in the number of AD bits and meets the given specifications. In this technical report we present full experimental results on using it to synthesize control software for two versions of buck DC-DC converters (single-input and multi-input), a widely used mixed-mode analog circuit. | ||||
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ | Serial | 106 | ||
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| Author | Chierichetti, Flavio; Lattanzi, Silvio; Mari, Federico; Panconesi, Alessandro | ||||
| Title | On Placing Skips Optimally in Expectation | Type | Conference Article | ||
| Year | 2008 | Publication | Web Search and Web Data Mining (WSDM 2008) | Abbreviated Journal | |
| Volume | Issue | Pages | 15-24 | ||
| Keywords | Information Retrieval | ||||
| Abstract | We study the problem of optimal skip placement in an inverted list. Assuming the query distribution to be known in advance, we formally prove that an optimal skip placement can be computed quite efficiently. Our best algorithm runs in time O(n log n), n being the length of the list. The placement is optimal in the sense that it minimizes the expected time to process a query. Our theoretical results are matched by experiments with a real corpus, showing that substantial savings can be obtained with respect to the tra- ditional skip placement strategy, that of placing consecutive skips, each spanning sqrt(n) many locations. | ||||
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| Publisher | Acm | Place of Publication | Editor | Najork, M.; Broder, A.Z.; Chakrabarti, S. | |
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ ChiLatMar08 | Serial | 94 | ||
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| Author | Mari, Federico; Tronci, Enrico | ||||
| Title | CEGAR Based Bounded Model Checking of Discrete Time Hybrid Systems | Type | Conference Article | ||
| Year | 2007 | Publication | Hybrid Systems: Computation and Control (HSCC 2007) | Abbreviated Journal | |
| Volume | Issue | Pages | 399-412 | ||
| Keywords | Model Checking, Abstraction, CEGAR, SAT, Hybrid Systems, DTHS | ||||
| Abstract | Many hybrid systems can be conveniently modeled as Piecewise Affine Discrete Time Hybrid Systems PA-DTHS. As well known Bounded Model Checking (BMC) for such systems comes down to solve a Mixed Integer Linear Programming (MILP) feasibility problem. We present a SAT based BMC algorithm for automatic verification of PA-DTHSs. Using Counterexample Guided Abstraction Refinement (CEGAR) our algorithm gradually transforms a PA-DTHS verification problem into larger and larger SAT problems. Our experimental results show that our approach can handle PA-DTHSs that are more then 50 times larger than those that can be handled using a MILP solver. | ||||
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| Publisher | Springer | Place of Publication | Editor | Bemporad, A.; Bicchi, A.; Buttazzo, G.C. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 4416 | Series Issue | Edition | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ MarTro07 | Serial | 92 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Exploiting Transition Locality in Automatic Verification of Finite State Concurrent Systems | Type | Journal Article | ||
| Year | 2004 | Publication | Sttt | Abbreviated Journal | |
| Volume | 6 | Issue | 4 | Pages | 320-341 |
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| Abstract | In this paper we show that statistical properties of the transition graph of a system to be verified can be exploited to improve memory or time performances of verification algorithms. We show experimentally that protocols exhibit transition locality. That is, with respect to levels of a breadth-first state space exploration, state transitions tend to be between states belonging to close levels of the transition graph. We support our claim by measuring transition locality for the set of protocols included in the Mur$\varphi$ verifier distribution. We present a cache-based verification algorithm that exploits transition locality to decrease memory usage and a disk-based verification algorithm that exploits transition locality to decrease disk read accesses, thus reducing the time overhead due to disk usage. Both algorithms have been implemented within the Mur$\varphi$ verifier. Our experimental results show that our cache-based algorithm can typically save more than 40% of memory with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction, whereas our disk-based verification algorithm is typically more than ten times faster than a previously proposed disk-based verification algorithm and, even when using 10% of the memory needed to complete verification, it is only between 40 and 530% (300% on average) slower than (RAM) Mur$\varphi$ with enough memory to complete the verification task at hand. Using just 300 MB of memory our disk-based Mur$\varphi$ was able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 GB of memory using standard Mur$\varphi$. | ||||
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| Call Number | Sapienza @ mari @ DIMTZ04j | Serial | 91 | ||
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| Author | Coppo, Mario; Dezani-Ciancaglini, Mariangiola; Giovannetti, Elio; Salvo, Ivano | ||||
| Title | Mobility Types for Mobile Processes in Mobile Ambients | Type | Journal Article | ||
| Year | 2003 | Publication | Electr. Notes Theor. Comput. Sci. | Abbreviated Journal | |
| Volume | 78 | Issue | Pages | ||
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| Abstract | We present an ambient-like calculus in which the open capability is dropped, and a new form of “lightweight  process mobility is introduced. The calculus comes equipped with a type system that allows the kind of values exchanged in communications and the access and mobility properties of processes to be controlled. A type inference procedure determines the “minimal  requirements to accept a system or a component as well typed. This gives a kind of principal typing. As an expressiveness test, we show that some well known calculi of concurrency and mobility can be encoded in our calculus in a natural way. | ||||
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| Call Number | Sapienza @ mari @ Coppo-Dezani-Giovannetti-Salvo:03 | Serial | 74 | ||
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