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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Linear Constraints and Guarded Predicates as a Modeling Language for Discrete Time Hybrid Systems | Type | Journal Article | ||
| Year | 2013 | Publication | International Journal on Advances in Software | Abbreviated Journal | Intern. Journal on Advances in SW |
| Volume | vol. 6, nr 1&2 | Issue | Pages | 155-169 | |
| Keywords | Model-based software design; Linear predicates; Hybrid systems | ||||
| Abstract | Model based design is particularly appealing in
software based control systems (e.g., embedded software) design, since in such a case system level specifications are much easier to define than the control software behavior itself. In turn, model based design of embedded systems requires modeling both continuous subsystems (typically, the plant) as well as discrete subsystems (the controller). This is typically done using hybrid systems. Mixed Integer Linear Programming (MILP) based abstraction techniques have been successfully applied to automatically synthesize correct-by-construction control software for discrete time linear hybrid systems, where plant dynamics is modeled as a linear predicate over state, input, and next state variables. Unfortunately, MILP solvers require such linear predicates to be conjunctions of linear constraints, which is not a natural way of modeling hybrid systems. In this paper we show that, under the hypothesis that each variable ranges over a bounded interval, any linear predicate built upon conjunction and disjunction of linear constraints can be automatically translated into an equivalent conjunctive predicate. Since variable bounds play a key role in this translation, our algorithm includes a procedure to compute all implicit variable bounds of the given linear predicate. Furthermore, we show that a particular form of linear predicates, namely guarded predicates, are a natural and powerful language to succinctly model discrete time linear hybrid systems dynamics. Finally, we experimentally show the feasibility of our approach on an important and challenging case study taken from the literature, namely the multi-input Buck DC-DC Converter. As an example, the guarded predicate that models (with 57 constraints) a 6-inputs Buck DC-DC Converter is translated in a conjunctive predicate (with 102 linear constraints) in about 40 minutes. |
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| Publisher | IARIA | Place of Publication | Editor | Luigi Lavazza | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Abbreviated Series Title | |||
| Series Volume | Series Issue | Edition | |||
ISSN  |
1942-2628 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ melatti @ | Serial | 115 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Synthesizing Control Software from Boolean Relations | Type | Journal Article | ||
| Year | 2012 | Publication | International Journal on Advances in Software | Abbreviated Journal | Intern. Journal on Advances in SW |
| Volume | vol. 5, nr 3&4 | Issue | Pages | 212-223 | |
| Keywords | Control Software Synthesis; Embedded Systems; Model Checking | ||||
| Abstract | Many software as well digital hardware automatic
synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately, the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper, we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a worst case execution time linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. Moreover, a formal proof of the proposed algorithm correctness is also shown. Finally, we present experimental results showing effectiveness of the proposed algorithm. |
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| Publisher | IARIA | Place of Publication | Editor | Luigi Lavazza | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Abbreviated Series Title | |||
| Series Volume | Series Issue | Edition | |||
| ISSN |
1942-2628 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ melatti @ | Serial | 108 | ||
| Permanent link to this record | |||||
| Author | Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. | ||||
| Title | On Checking Equivalence of Simulation Scripts | Type | Journal Article | ||
| Year | 2021 | Publication | Journal of Logical and Algebraic Methods in Programming | Abbreviated Journal | |
| Volume | Issue | Pages | 100640 | ||
| Keywords | Formal verification, Simulation based formal verification, Formal Verification of cyber-physical systems, System-level formal verification | ||||
| Abstract | To support Model Based Design of Cyber-Physical Systems (CPSs) many simulation based approaches to System Level Formal Verification (SLFV) have been devised. Basically, these are Bounded Model Checking approaches (since simulation horizon is of course bounded) relying on simulators to compute the system dynamics and thereby verify the given system properties. The main obstacle to simulation based SLFV is the large number of simulation scenarios to be considered and thus the huge amount of simulation time needed to complete the verification task. To save on computation time, simulation based SLFV approaches exploit the capability of simulators to save and restore simulation states. Essentially, such a time saving is obtained by optimising the simulation script defining the simulation activity needed to carry out the verification task. Although such approaches aim to (bounded) formal verification, as a matter of fact, the proof of correctness of the methods to optimise simulation scripts basically relies on an intuitive semantics for simulation scripting languages. This hampers the possibility of formally showing that the optimisations introduced to speed up the simulation activity do not actually omit checking of relevant behaviours for the system under verification. The aim of this paper is to fill the above gap by presenting an operational semantics for simulation scripting languages and by proving soundness and completeness properties for it. This, in turn, enables formal proofs of equivalence between unoptimised and optimised simulation scripts. | ||||
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| Series Volume | Series Issue | Edition | |||
| ISSN |
2352-2208 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | no | |||
| Call Number | MCLab @ davi @ Mancini2021100640 | Serial | 183 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Exploiting Transition Locality in the Disk Based Mur$\varphi$ Verifier | Type | Conference Article | ||
| Year | 2002 | Publication | 4th International Conference on Formal Methods in Computer-Aided Design (FMCAD) | Abbreviated Journal | |
| Volume | Issue | Pages | 202-219 | ||
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| Abstract | The main obstruction to automatic verification of Finite State Systems is the huge amount of memory required to complete the verification task (state explosion). This motivates research on distributed as well as disk based verification algorithms. In this paper we present a disk based Breadth First Explicit State Space Exploration algorithm as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm exploits transition locality (i.e. the statistical fact that most transitions lead to unvisited states or to recently visited states) to decrease disk read accesses thus reducing the time overhead due to disk usage. A disk based verification algorithm for Mur$\varphi$ has been already proposed in the literature. To measure the time speed up due to locality exploitation we compared our algorithm with such previously proposed algorithm. Our experimental results show that our disk based verification algorithm is typically more than 10 times faster than such previously proposed disk based verification algorithm. To measure the time overhead due to disk usage we compared our algorithm with RAM based verification using the (standard) Mur$\varphi$ verifier with enough memory to complete the verification task. Our experimental results show that even when using 1/10 of the RAM needed to complete verification, our disk based algorithm is only between 1.4 and 5.3 times (3 times on average) slower than (RAM) Mur$\varphi$ with enough RAM memory to complete the verification task at hand. Using our disk based Mur$\varphi$ we were able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 gigabytes of RAM using RAM based Mur$\varphi$. | ||||
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| Publisher | Springer | Place of Publication | Portland, OR, USA | Editor | Aagaard, M.; O'Leary, J.W. |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 2517 | Series Issue | Edition | ||
| ISSN |
3-540-00116-6 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ fmcad02 | Serial | 41 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Minichino, Michele; Ciancamerla, Ester; Parisse, Andrea; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Automatic Verification of a Turbogas Control System with the Mur$\varphi$ Verifier | Type | Conference Article | ||
| Year | 2003 | Publication | Hybrid Systems: Computation and Control, 6th International Workshop, HSCC 2003 Prague, Czech Republic, April 3-5, 2003, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 141-155 | ||
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| Abstract | Automatic analysis of Hybrid Systems poses formidable challenges both from a modeling as well as from a verification point of view. We present a case study on automatic verification of a Turbogas Control System (TCS) using an extended version of the Mur$\varphi$ verifier. TCS is the heart of ICARO, a 2MW Co-generative Electric Power Plant. For large hybrid systems, as TCS is, the modeling effort accounts for a significant part of the whole verification activity. In order to ease our modeling effort we extended the Mur$\varphi$ verifier by importing the C language long double type (finite precision real numbers) into it. We give experimental results on running our extended Mur$\varphi$ on our TCS model. For example using Mur$\varphi$ we were able to compute an admissible range of values for the variation speed of the user demand of electric power to the turbogas. | ||||
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| Publisher | Springer | Place of Publication | Editor | Maler, O.; Pnueli, A. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 2623 | Series Issue | Edition | ||
| ISSN |
3-540-00913-2 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dimmcptz03 | Serial | 88 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Finite Horizon Analysis of Stochastic Systems with the Mur$\varphi$ Verifier | Type | Conference Article | ||
| Year | 2003 | Publication | Theoretical Computer Science, 8th Italian Conference, ICTCS 2003, Bertinoro, Italy, October 13-15, 2003, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 58-71 | ||
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| Abstract | Many reactive systems are actually Stochastic Processes. Automatic analysis of such systems is usually very difficult thus typically one simplifies the analysis task by using simulation or by working on a simplified model (e.g. a Markov Chain). We present a Finite Horizon Probabilistic Model Checking approach which essentially can handle the same class of stochastic processes of a typical simulator. This yields easy modeling of the system to be analyzed together with formal verification capabilities. Our approach is based on a suitable disk based extension of the Mur$\varphi$ verifier. Moreover we present experimental results showing effectiveness of our approach. | ||||
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| Publisher | Springer | Place of Publication | Editor | Blundo, C.; Laneve, C. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 2841 | Series Issue | Edition | ||
| ISSN |
3-540-20216-1 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ DIMTZ03c | Serial | 90 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Finite Horizon Analysis of Markov Chains with the Mur$\varphi$ Verifier | Type | Conference Article | ||
| Year | 2003 | Publication | Correct Hardware Design and Verification Methods, 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, 2003, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 394-409 | ||
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| Abstract | In this paper we present an explicit disk based verification algorithm for Probabilistic Systems defining discrete time/finite state Markov Chains. Given a Markov Chain and an integer k (horizon), our algorithm checks whether the probability of reaching an error state in at most k steps is below a given threshold. We present an implementation of our algorithm within a suitable extension of the Mur$\varphi$ verifier. We call the resulting probabilistic model checker FHP-Mur$\varphi$ (Finite Horizon Probabilistic Mur$\varphi$). We present experimental results comparing FHP-Mur$\varphi$ with (a finite horizon subset of) PRISM, a state-of-the-art symbolic model checker for Markov Chains. Our experimental results show that FHP-Mur$\varphi$ can handle systems that are out of reach for PRISM, namely those involving arithmetic operations on the state variables (e.g. hybrid systems). | ||||
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| Publisher | Springer | Place of Publication | Editor | Geist, D.; Tronci, E. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 2860 | Series Issue | Edition | ||
| ISSN |
3-540-20363-X | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dimtz03 | Serial | 84 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Integrating RAM and Disk Based Verification within the Mur$\varphi$ Verifier | Type | Conference Article | ||
| Year | 2003 | Publication | Correct Hardware Design and Verification Methods, 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, 2003, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 277-282 | ||
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| Abstract | We present a verification algorithm that can automatically switch from RAM based verification to disk based verification without discarding the work done during the RAM based verification phase. This avoids having to choose beforehand the proper verification algorithm. Our experimental results show that typically our integrated algorithm is as fast as (sometime faster than) the fastest of the two base (i.e. RAM based and disk based) verification algorithms. | ||||
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| Publisher | Springer | Place of Publication | Editor | Geist, D.; Tronci, E. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 2860 | Series Issue | Edition | ||
| ISSN |
3-540-20363-X | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ DIMTZ03a | Serial | 85 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Bounded Probabilistic Model Checking with the Mur$\varphi$ Verifier | Type | Conference Article | ||
| Year | 2004 | Publication | Formal Methods in Computer-Aided Design, 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004, Proceedings | Abbreviated Journal | |
| Volume | Issue | Pages | 214-229 | ||
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| Abstract | In this paper we present an explicit verification algorithm for Probabilistic Systems defining discrete time/finite state Markov Chains. We restrict ourselves to verification of Bounded PCTL formulas (BPCTL), that is, PCTL formulas in which all Until operators are bounded, possibly with different bounds. This means that we consider only paths (system runs) of bounded length. Given a Markov Chain $\cal M$ and a BPCTL formula Φ, our algorithm checks if Φ is satisfied in $\cal M$. This allows to verify important properties, such as reliability in Discrete Time Hybrid Systems. We present an implementation of our algorithm within a suitable extension of the Mur$\varphi$ verifier. We call FHP-Mur$\varphi$ (Finite Horizon Probabilistic Mur$\varphi$) such extension of the Mur$\varphi$ verifier. We give experimental results comparing FHP-Mur$\varphi$ with (a finite horizon subset of) PRISM, a state-of-the-art symbolic model checker for Markov Chains. Our experimental results show that FHP-Mur$\varphi$ can effectively handle verification of BPCTL formulas for systems that are out of reach for PRISM, namely those involving arithmetic operations on the state variables (e.g. hybrid systems). | ||||
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| Publisher | Springer | Place of Publication | Editor | Hu, A.J.; Martin, A.K. | |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 3312 | Series Issue | Edition | ||
| ISSN |
3-540-23738-0 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dimtz04 | Serial | 87 | ||
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| Author | Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa | ||||
| Title | Exploiting Transition Locality in Automatic Verification | Type | Conference Article | ||
| Year | 2001 | Publication | 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) | Abbreviated Journal | |
| Volume | Issue | Pages | 259-274 | ||
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| Abstract | In this paper we present an algorithm to contrast state explosion when using Explicit State Space Exploration to verify protocols. We show experimentally that protocols exhibit transition locality. We present a verification algorithm that exploits transition locality as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm is compatible with all Breadth First (BF) optimization techniques present in the Mur$\varphi$ verifier and it is by no means a substitute for any of them. In fact, since our algorithm trades space with time, it is typically most useful when one runs out of memory and has already used all other state reduction techniques present in the Mur$\varphi$ verifier. Our experimental results show that using our approach we can typically save more than 40% of RAM with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction. | ||||
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| Publisher | Springer | Place of Publication | Livingston, Scotland, UK | Editor | Margaria, T.; Melham, T.F. |
| Language | Summary Language | Original Title | |||
| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 2144 | Series Issue | Edition | ||
| ISSN |
3-540-42541-1 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ charme01 | Serial | 44 | ||
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