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Cavaliere, Federico; Mari, Federico; Melatti, Igor; Minei, Giovanni; Salvo, Ivano; Tronci, Enrico; Verzino, Giovanni; Yushtein, Yuri |
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Title |
Model Checking Satellite Operational Procedures |
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Conference Article |
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2011 |
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DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. San Anton, Malta, EuroSpace. |
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We present a model checking approach for the automatic verification of satellite operational procedures (OPs). Building a model for a complex system as a satellite is a hard task. We overcome this obstruction by using a suitable simulator (SIMSAT) for the satellite. Our approach aims at improving OP quality assurance by automatic exhaustive exploration of all possible simulation scenarios. Moreover, our solution decreases OP verification costs by using a model checker (CMurphi) to automatically drive the simulator. We model OPs as user-executed programs observing the simulator telemetries and sending telecommands to the simulator. In order to assess feasibility of our approach we present experimental results on a simple meaningful scenario. Our results show that we can save up to 90% of verification time. |
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yes |
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Sapienza @ mari @ Dasia11 |
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13 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
Model Based Synthesis of Control Software from System Level Formal Specifications |
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2013 |
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abs/1107.5638 |
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Many Embedded Systems are indeed Software Based Control Systems, that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for automatic synthesis of embedded systems control software.
We present an algorithm, along with a tool QKS implementing it, that from a formal model (as a Discrete Time Linear Hybrid System) of the controlled system (plant), implementation specifications (that is, number of bits in the Analog-to-Digital, AD, conversion) and System Level Formal Specifications (that is, safety and liveness requirements for the closed loop system) returns correct-by-construction control software that has a Worst Case Execution Time (WCET) linear in the number of AD bits and meets the given specifications.
We show feasibility of our approach by presenting experimental results on using it to synthesize control software for a buck DC-DC converter, a widely used mixed-mode analog circuit, and for the inverted pendulum. |
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CoRR, Technical Report |
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yes |
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Call Number |
Sapienza @ mari @ |
Serial |
104 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
From Boolean Functional Equations to Control Software |
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Report |
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2011 |
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abs/1106.0468 |
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Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) at most O(nr), being n = |x| the number of arguments of functions in F and r the number of functions in F. |
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CoRR, Technical Report |
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yes |
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Call Number |
Sapienza @ mari @ |
Serial |
105 |
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Author |
Sinisi, S.; Alimguzhin, V.; Mancini, T.; Tronci, E.; Mari, F.; Leeners, B. |
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Title |
Optimal Personalised Treatment Computation through In Silico Clinical Trials on Patient Digital Twins |
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Journal Article |
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Year |
2020 |
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Abbreviated Journal |
Fundamenta Informaticae |
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Volume |
174 |
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Pages |
283-310 |
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Keywords |
Artificial Intelligence; Virtual Physiological Human; In Silico Clinical Trials; Simulation; Personalised Medicine; In Silico Treatment Optimisation |
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In Silico Clinical Trials (ISCT), i.e. clinical experimental campaigns carried out by means of computer simulations, hold the promise to decrease time and cost for the safety and efficacy assessment of pharmacological treatments, reduce the need for animal and human testing, and enable precision medicine. In this paper we present methods and an algorithm that, by means of extensive computer simulation-based experimental campaigns (ISCT) guided by intelligent search, optimise a pharmacological treatment for an individual patient (precision medicine ). We show the effectiveness of our approach on a case study involving a real pharmacological treatment, namely the downregulation phase of a complex clinical protocol for assisted reproduction in humans. |
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IOS Press |
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1875-8681 |
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no |
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Call Number |
MCLab @ davi @ |
Serial |
187 |
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Author |
Alimguzhin, V.; Mari, F.; Melatti, I.; Tronci, E.; Ebeid, E.; Mikkelsen, S.A.; Jacobsen, R.H.; Gruber, J.K.; Hayes, B.; Huerta, F.; Prodanovic, M. |
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Title |
A Glimpse of SmartHG Project Test-bed and Communication Infrastructure |
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Conference Article |
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2015 |
Publication |
Digital System Design (DSD), 2015 Euromicro Conference on |
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225-232 |
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Keywords |
Batteries; Control systems; Databases; Production; Sensors; Servers; Smart grids; Grid State Estimation; Peak Shaving; Policy Robustness Verification; Price Policy Synthesis |
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Sapienza @ preissler @ Alimguzhin_etal2015 |
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127 |
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Author |
Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E.; Gruber, J.K.; Hayes, B.; Prodanovic, M.; Elmegaard, L. |
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Title |
User Flexibility Aware Price Policy Synthesis for Smart Grids |
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Conference Article |
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2015 |
Publication |
Digital System Design (DSD), 2015 Euromicro Conference on |
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478-485 |
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Keywords |
Contracts; Current measurement; Load management; Power demand; Power measurement; State estimation; Substations; Grid State Estimation; Peak Shaving; Policy Robustness Verification; Price Policy Synthesis |
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Call Number |
Sapienza @ preissler @ Mancini_etal2015_3 |
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136 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
Synthesizing Control Software from Boolean Relations |
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Journal Article |
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Year |
2012 |
Publication |
International Journal on Advances in Software |
Abbreviated Journal |
Intern. Journal on Advances in SW |
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vol. 5, nr 3&4 |
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212-223 |
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Keywords |
Control Software Synthesis; Embedded Systems; Model Checking |
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Abstract |
Many software as well digital hardware automatic
synthesis methods define the set of
implementations meeting the given system
specifications with a boolean relation K. In
such a context a fundamental step in the software
(hardware) synthesis process is finding effective
solutions to the functional equation defined by
K. This entails finding a (set of) boolean
function(s) F (typically represented using
OBDDs, Ordered Binary Decision Diagrams)
such that: 1) for all x for which K is
satisfiable, K(x, F(x)) = 1 holds; 2) the
implementation of F is efficient with respect
to given implementation parameters such as code
size or execution time. While this problem has
been widely studied in digital hardware synthesis,
little has been done in a software synthesis
context. Unfortunately, the approaches developed
for hardware synthesis cannot be directly used in
a software context. This motivates investigation
of effective methods to solve the above problem
when F has to be implemented with software. In
this paper, we present an algorithm that, from an
OBDD representation for K, generates a C code
implementation for F that has the same size as
the OBDD for F and a worst case execution time
linear in nr, being n = |x| the number of
input arguments for functions in F and r the
number of functions in F. Moreover, a formal
proof of the proposed algorithm correctness is
also shown. Finally, we present experimental
results showing effectiveness of the proposed
algorithm. |
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IARIA |
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Editor |
Luigi Lavazza |
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1942-2628 |
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yes |
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Call Number |
Sapienza @ melatti @ |
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108 |
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Author |
Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
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Title |
On Checking Equivalence of Simulation Scripts |
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Journal Article |
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2021 |
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Journal of Logical and Algebraic Methods in Programming |
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100640 |
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Formal verification, Simulation based formal verification, Formal Verification of cyber-physical systems, System-level formal verification |
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Abstract |
To support Model Based Design of Cyber-Physical Systems (CPSs) many simulation based approaches to System Level Formal Verification (SLFV) have been devised. Basically, these are Bounded Model Checking approaches (since simulation horizon is of course bounded) relying on simulators to compute the system dynamics and thereby verify the given system properties. The main obstacle to simulation based SLFV is the large number of simulation scenarios to be considered and thus the huge amount of simulation time needed to complete the verification task. To save on computation time, simulation based SLFV approaches exploit the capability of simulators to save and restore simulation states. Essentially, such a time saving is obtained by optimising the simulation script defining the simulation activity needed to carry out the verification task. Although such approaches aim to (bounded) formal verification, as a matter of fact, the proof of correctness of the methods to optimise simulation scripts basically relies on an intuitive semantics for simulation scripting languages. This hampers the possibility of formally showing that the optimisations introduced to speed up the simulation activity do not actually omit checking of relevant behaviours for the system under verification. The aim of this paper is to fill the above gap by presenting an operational semantics for simulation scripting languages and by proving soundness and completeness properties for it. This, in turn, enables formal proofs of equivalence between unoptimised and optimised simulation scripts. |
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2352-2208 |
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no |
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Call Number |
MCLab @ davi @ Mancini2021100640 |
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183 |
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Author |
Chierichetti, Flavio; Lattanzi, Silvio; Mari, Federico; Panconesi, Alessandro |
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Title |
On Placing Skips Optimally in Expectation |
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Conference Article |
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2008 |
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Web Search and Web Data Mining (WSDM 2008) |
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15-24 |
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Keywords |
Information Retrieval |
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We study the problem of optimal skip placement in an inverted list. Assuming the query distribution to be known in advance, we formally prove that an optimal skip placement can be computed quite efficiently. Our best algorithm runs in time O(n log n), n being the length of the list. The placement is optimal in the sense that it minimizes the expected time to process a query. Our theoretical results are matched by experiments with a real corpus, showing that substantial savings can be obtained with respect to the tra- ditional skip placement strategy, that of placing consecutive skips, each spanning sqrt(n) many locations. |
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Acm |
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Najork, M.; Broder, A.Z.; Chakrabarti, S. |
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yes |
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Call Number |
Sapienza @ mari @ ChiLatMar08 |
Serial |
94 |
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Author |
Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
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Title |
Anytime system level verification via parallel random exhaustive hardware in the loop simulation |
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2016 |
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Microprocessors and Microsystems |
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41 |
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12-28 |
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Model Checking of Hybrid Systems; Model checking driven simulation; Hardware in the loop simulation |
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Abstract System level verification of cyber-physical systems has the goal of verifying that the whole (i.e., software + hardware) system meets the given specifications. Model checkers for hybrid systems cannot handle system level verification of actual systems. Thus, Hardware In the Loop Simulation (HILS) is currently the main workhorse for system level verification. By using model checking driven exhaustive HILS, System Level Formal Verification (SLFV) can be effectively carried out for actual systems. We present a parallel random exhaustive HILS based model checker for hybrid systems that, by simulating all operational scenarios exactly once in a uniform random order, is able to provide, at any time during the verification process, an upper bound to the probability that the System Under Verification exhibits an error in a yet-to-be-simulated scenario (Omission Probability). We show effectiveness of the proposed approach by presenting experimental results on SLFV of the Inverted Pendulum on a Cart and the Fuel Control System examples in the Simulink distribution. To the best of our knowledge, no previously published model checker can exhaustively verify hybrid systems of such a size and provide at any time an upper bound to the Omission Probability. |
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0141-9331 |
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MCLab @ davi @ Mancini201612 |
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155 |
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