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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Exploiting Transition Locality in the Disk Based Mur$\varphi$ Verifier |
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Conference Article |
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Year |
2002 |
Publication |
4th International Conference on Formal Methods in Computer-Aided Design (FMCAD) |
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202-219 |
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Abstract |
The main obstruction to automatic verification of Finite State Systems is the huge amount of memory required to complete the verification task (state explosion). This motivates research on distributed as well as disk based verification algorithms. In this paper we present a disk based Breadth First Explicit State Space Exploration algorithm as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm exploits transition locality (i.e. the statistical fact that most transitions lead to unvisited states or to recently visited states) to decrease disk read accesses thus reducing the time overhead due to disk usage. A disk based verification algorithm for Mur$\varphi$ has been already proposed in the literature. To measure the time speed up due to locality exploitation we compared our algorithm with such previously proposed algorithm. Our experimental results show that our disk based verification algorithm is typically more than 10 times faster than such previously proposed disk based verification algorithm. To measure the time overhead due to disk usage we compared our algorithm with RAM based verification using the (standard) Mur$\varphi$ verifier with enough memory to complete the verification task. Our experimental results show that even when using 1/10 of the RAM needed to complete verification, our disk based algorithm is only between 1.4 and 5.3 times (3 times on average) slower than (RAM) Mur$\varphi$ with enough RAM memory to complete the verification task at hand. Using our disk based Mur$\varphi$ we were able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 gigabytes of RAM using RAM based Mur$\varphi$. |
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Springer |
Place of Publication |
Portland, OR, USA |
Editor |
Aagaard, M.; O'Leary, J.W. |
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Lecture Notes in Computer Science |
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Series Volume |
2517 |
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3-540-00116-6 |
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yes |
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Call Number |
Sapienza @ mari @ fmcad02 |
Serial |
41 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico; Alvisi, Lorenzo; Clement, Allen; Li, Harry |
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Title |
Model Checking Nash Equilibria in MAD Distributed Systems |
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Conference Article |
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Year |
2008 |
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FMCAD '08: Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design |
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1-8 |
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Keywords |
Model Checking, MAD Distributed System, Nash Equilibrium |
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Abstract |
We present a symbolic model checking algorithm for verification of Nash equilibria in finite state mechanisms modeling Multiple Administrative Domains (MAD) distributed systems. Given a finite state mechanism, a proposed protocol for each agent and an indifference threshold for rewards, our model checker returns PASS if the proposed protocol is a Nash equilibrium (up to the given indifference threshold) for the given mechanism, FAIL otherwise. We implemented our model checking algorithm inside the NuSMV model checker and present experimental results showing its effectiveness for moderate size mechanisms. For example, we can handle mechanisms which corresponding normal form games would have more than $10^20$ entries. To the best of our knowledge, no model checking algorithm for verification of mechanism Nash equilibria has been previously published. |
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IEEE Press |
Place of Publication |
Piscataway, NJ, USA |
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Cimatti, A.; Jones, R. |
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978-1-4244-2735-2 |
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yes |
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Call Number |
Sapienza @ mari @ MarMelSalTroAlvCle08 |
Serial |
93 |
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Author |
Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa |
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Title |
A Probabilistic Approach to Automatic Verification of Concurrent Systems |
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Conference Article |
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Year |
2001 |
Publication |
8th Asia-Pacific Software Engineering Conference (APSEC) |
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317-324 |
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The main barrier to automatic verification of concurrent systems is the huge amount of memory required to complete the verification task (state explosion). In this paper we present a probabilistic algorithm for automatic verification via model checking. Our algorithm trades space with time. In particular, when memory is full because of state explosion our algorithm does not give up verification. Instead it just proceeds at a lower speed and its results will only hold with some arbitrarily small error probability. Our preliminary experimental results show that by using our probabilistic algorithm we can typically save more than 30% of RAM with an average time penalty of about 100% w.r.t. a deterministic state space exploration with enough memory to complete the verification task. This is better than giving up the verification task because of lack of memory. |
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IEEE Computer Society |
Place of Publication |
Macau, China |
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0-7695-1408-1 |
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yes |
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Call Number |
Sapienza @ mari @ apsec01 |
Serial |
43 |
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Author |
Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa |
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Title |
Exploiting Transition Locality in Automatic Verification |
Type |
Conference Article |
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Year |
2001 |
Publication |
11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) |
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259-274 |
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In this paper we present an algorithm to contrast state explosion when using Explicit State Space Exploration to verify protocols. We show experimentally that protocols exhibit transition locality. We present a verification algorithm that exploits transition locality as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm is compatible with all Breadth First (BF) optimization techniques present in the Mur$\varphi$ verifier and it is by no means a substitute for any of them. In fact, since our algorithm trades space with time, it is typically most useful when one runs out of memory and has already used all other state reduction techniques present in the Mur$\varphi$ verifier. Our experimental results show that using our approach we can typically save more than 40% of RAM with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction. |
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Springer |
Place of Publication |
Livingston, Scotland, UK |
Editor |
Margaria, T.; Melham, T.F. |
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Lecture Notes in Computer Science |
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Series Volume |
2144 |
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3-540-42541-1 |
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yes |
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Call Number |
Sapienza @ mari @ charme01 |
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44 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Finite horizon analysis of Markov Chains with the Mur$\varphi$ verifier |
Type |
Journal Article |
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Year |
2006 |
Publication |
Int. J. Softw. Tools Technol. Transf. |
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Volume |
8 |
Issue |
4 |
Pages |
397-409 |
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Abstract |
In this paper we present an explicit disk-based verification algorithm for Probabilistic Systems defining discrete time/finite state Markov Chains. Given a Markov Chain and an integer k (horizon), our algorithm checks whether the probability of reaching an error state in at most k steps is below a given threshold. We present an implementation of our algorithm within a suitable extension of the Mur$\varphi$ verifier. We call the resulting probabilistic model checker FHP-Mur$\varphi$ (Finite Horizon Probabilistic Mur$\varphi$). We present experimental results comparing FHP-Mur$\varphi$ with (a finite horizon subset of) PRISM, a state-of-the-art symbolic model checker for Markov Chains. Our experimental results show that FHP-Mur$\varphi$ can handle systems that are out of reach for PRISM, namely those involving arithmetic operations on the state variables (e.g. hybrid systems). |
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Springer-Verlag |
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Berlin, Heidelberg |
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1433-2779 |
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yes |
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Call Number |
Sapienza @ mari @ Dimtz06 |
Serial |
78 |
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Author |
Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico |
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Title |
Anytime System Level Verification via Random Exhaustive Hardware In The Loop Simulation |
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Conference Article |
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2014 |
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In Proceedings of 17th EuroMicro Conference on Digital System Design (DSD 2014) |
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MCLab @ davi @ |
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122 |
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Author |
Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico |
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Title |
Simulator Semantics for System Level Formal Verification |
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Conference Article |
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2015 |
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Proceedings Sixth International Symposium on Games, Automata, Logics and Formal Verification (GandALF 2015), |
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MCLab @ davi @ |
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125 |
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Author |
Tronci, E.; Mancini, T.; Mari, F.; Melatti, I.; Salvo, I.; Prodanovic, M.; Gruber, J. K.; Hayes, B.; Elmegaard, L. |
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Title |
Demand-Aware Price Policy Synthesis and Verification Services for Smart Grids |
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Conference Article |
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2014 |
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Proceedings of Smart Grid Communications (SmartGridComm), 2014 IEEE International Conference On |
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Sapienza @ melatti @ |
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121 |
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Tronci, E.; Mancini, T.; Salvo, I.; Mari, F.; Melatti, I.; Massini, A.; Sinisi, S.; Davì, F.; Dierkes, T.; Ehrig, R.; Röblitz, S.; Leeners, B.; Krüger, T.; Egli, M.; Ille, F. |
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Title |
Patient-Specific Models from Inter-Patient Biological Models and Clinical Records |
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Conference Article |
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2014 |
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Formal Methods in Computer-Aided Design (FMCAD) |
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Sapienza @ mari @ |
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120 |
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Tronci, E.; Mancini, T.; Mari, F.; Melatti, I.; Jacobsen, R. H.; Ebeid, E.; Mikkelsen, S. A.; Prodanovic, M.; Gruber, J. K.; Hayes, B. |
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Title |
SmartHG: Energy Demand Aware Open Services for Smart Grid Intelligent Automation |
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Conference Article |
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2014 |
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Proceedings of the Work in Progress Session of SEAA/DSD 2014 |
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978-3-902457-40-0 |
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Sapienza @ mari @ |
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119 |
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