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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | A Map-Reduce Parallel Approach to Automatic Synthesis of Control Software | Type | Conference Article | ||
| Year | 2013 | Publication  |
Proc. of International SPIN Symposium on Model Checking of Software (SPIN 2013) | Abbreviated Journal | International SPIN Symposium on Model Checking of Software |
| Volume | Issue | Pages | 43-60 | ||
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| Publisher | Springer - Verlag | Place of Publication | Editor | ||
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| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
| Series Volume | 7976 | Series Issue | Edition | ||
| ISSN | 0302-9743 | ISBN | 978-3-642-39175-0 | Medium | |
| Area | Expedition | Conference | |||
| Notes | Approved | no | |||
| Call Number | Sapienza @ melatti @ | Serial | 112 | ||
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| Author | Mari, Federico; Melatti, Igor; Tronci, Enrico; Finzi, Alberto | ||||
| Title | A multi-hop advertising discovery and delivering protocol for multi administrative domain MANET | Type | Journal Article | ||
| Year | 2013 | Publication |
Mobile Information Systems | Abbreviated Journal | Mobile Information Systems |
| Volume | 3 | Issue | 9 | Pages | 261-280 |
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| Publisher | IOS Press | Place of Publication | Editor | ||
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| ISSN | 1574-017x (Print) 1875-905X (Online) | ISBN | Medium | ||
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| Notes | Approved | no | |||
| Call Number | Sapienza @ melatti @ | Serial | 109 | ||
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| Author | Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. | ||||
| Title | Anytime system level verification via parallel random exhaustive hardware in the loop simulation | Type | Journal Article | ||
| Year | 2016 | Publication |
Microprocessors and Microsystems | Abbreviated Journal | |
| Volume | 41 | Issue | Pages | 12-28 | |
| Keywords | Model Checking of Hybrid Systems; Model checking driven simulation; Hardware in the loop simulation | ||||
| Abstract | Abstract System level verification of cyber-physical systems has the goal of verifying that the whole (i.e., software + hardware) system meets the given specifications. Model checkers for hybrid systems cannot handle system level verification of actual systems. Thus, Hardware In the Loop Simulation (HILS) is currently the main workhorse for system level verification. By using model checking driven exhaustive HILS, System Level Formal Verification (SLFV) can be effectively carried out for actual systems. We present a parallel random exhaustive HILS based model checker for hybrid systems that, by simulating all operational scenarios exactly once in a uniform random order, is able to provide, at any time during the verification process, an upper bound to the probability that the System Under Verification exhibits an error in a yet-to-be-simulated scenario (Omission Probability). We show effectiveness of the proposed approach by presenting experimental results on SLFV of the Inverted Pendulum on a Cart and the Fuel Control System examples in the Simulink distribution. To the best of our knowledge, no previously published model checker can exhaustively verify hybrid systems of such a size and provide at any time an upper bound to the Omission Probability. | ||||
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| ISSN | 0141-9331 | ISBN | Medium | ||
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| Notes | Approved | no | |||
| Call Number | MCLab @ davi @ Mancini201612 | Serial | 155 | ||
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| Author | Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. | ||||
| Title | On Checking Equivalence of Simulation Scripts | Type | Journal Article | ||
| Year | 2021 | Publication |
Journal of Logical and Algebraic Methods in Programming | Abbreviated Journal | |
| Volume | Issue | Pages | 100640 | ||
| Keywords | Formal verification, Simulation based formal verification, Formal Verification of cyber-physical systems, System-level formal verification | ||||
| Abstract | To support Model Based Design of Cyber-Physical Systems (CPSs) many simulation based approaches to System Level Formal Verification (SLFV) have been devised. Basically, these are Bounded Model Checking approaches (since simulation horizon is of course bounded) relying on simulators to compute the system dynamics and thereby verify the given system properties. The main obstacle to simulation based SLFV is the large number of simulation scenarios to be considered and thus the huge amount of simulation time needed to complete the verification task. To save on computation time, simulation based SLFV approaches exploit the capability of simulators to save and restore simulation states. Essentially, such a time saving is obtained by optimising the simulation script defining the simulation activity needed to carry out the verification task. Although such approaches aim to (bounded) formal verification, as a matter of fact, the proof of correctness of the methods to optimise simulation scripts basically relies on an intuitive semantics for simulation scripting languages. This hampers the possibility of formally showing that the optimisations introduced to speed up the simulation activity do not actually omit checking of relevant behaviours for the system under verification. The aim of this paper is to fill the above gap by presenting an operational semantics for simulation scripting languages and by proving soundness and completeness properties for it. This, in turn, enables formal proofs of equivalence between unoptimised and optimised simulation scripts. | ||||
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| Series Volume | Series Issue | Edition | |||
| ISSN | 2352-2208 | ISBN | Medium | ||
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| Notes | Approved | no | |||
| Call Number | MCLab @ davi @ Mancini2021100640 | Serial | 183 | ||
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| Author | Toni Mancini; Enrico Tronci; Ivano Salvo; Federico Mari; Annalisa Massini; Igor Melatti | ||||
| Title | Computing Biological Model Parameters by Parallel Statistical Model Checking | Type | Journal Article | ||
| Year | 2015 | Publication |
International Work Conference on Bioinformatics and Biomedical Engineering (IWBBIO 2015) | Abbreviated Journal | |
| Volume | 9044 | Issue | Pages | 542-554 | |
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| Notes | Approved | no | |||
| Call Number | MCLab @ davi @ | Serial | 124 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Linear Constraints and Guarded Predicates as a Modeling Language for Discrete Time Hybrid Systems | Type | Journal Article | ||
| Year | 2013 | Publication |
International Journal on Advances in Software | Abbreviated Journal | Intern. Journal on Advances in SW |
| Volume | vol. 6, nr 1&2 | Issue | Pages | 155-169 | |
| Keywords | Model-based software design; Linear predicates; Hybrid systems | ||||
| Abstract | Model based design is particularly appealing in
software based control systems (e.g., embedded software) design, since in such a case system level specifications are much easier to define than the control software behavior itself. In turn, model based design of embedded systems requires modeling both continuous subsystems (typically, the plant) as well as discrete subsystems (the controller). This is typically done using hybrid systems. Mixed Integer Linear Programming (MILP) based abstraction techniques have been successfully applied to automatically synthesize correct-by-construction control software for discrete time linear hybrid systems, where plant dynamics is modeled as a linear predicate over state, input, and next state variables. Unfortunately, MILP solvers require such linear predicates to be conjunctions of linear constraints, which is not a natural way of modeling hybrid systems. In this paper we show that, under the hypothesis that each variable ranges over a bounded interval, any linear predicate built upon conjunction and disjunction of linear constraints can be automatically translated into an equivalent conjunctive predicate. Since variable bounds play a key role in this translation, our algorithm includes a procedure to compute all implicit variable bounds of the given linear predicate. Furthermore, we show that a particular form of linear predicates, namely guarded predicates, are a natural and powerful language to succinctly model discrete time linear hybrid systems dynamics. Finally, we experimentally show the feasibility of our approach on an important and challenging case study taken from the literature, namely the multi-input Buck DC-DC Converter. As an example, the guarded predicate that models (with 57 constraints) a 6-inputs Buck DC-DC Converter is translated in a conjunctive predicate (with 102 linear constraints) in about 40 minutes. |
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| Publisher | IARIA | Place of Publication | Editor | Luigi Lavazza | |
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| Series Volume | Series Issue | Edition | |||
| ISSN | 1942-2628 | ISBN | Medium | ||
| Area | Expedition | Conference | |||
| Notes | Approved | yes | |||
| Call Number | Sapienza @ melatti @ | Serial | 115 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Synthesizing Control Software from Boolean Relations | Type | Journal Article | ||
| Year | 2012 | Publication |
International Journal on Advances in Software | Abbreviated Journal | Intern. Journal on Advances in SW |
| Volume | vol. 5, nr 3&4 | Issue | Pages | 212-223 | |
| Keywords | Control Software Synthesis; Embedded Systems; Model Checking | ||||
| Abstract | Many software as well digital hardware automatic
synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately, the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper, we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a worst case execution time linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. Moreover, a formal proof of the proposed algorithm correctness is also shown. Finally, we present experimental results showing effectiveness of the proposed algorithm. |
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| Publisher | IARIA | Place of Publication | Editor | Luigi Lavazza | |
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| ISSN | 1942-2628 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ melatti @ | Serial | 108 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Finite horizon analysis of Markov Chains with the Mur$\varphi$ verifier | Type | Journal Article | ||
| Year | 2006 | Publication |
Int. J. Softw. Tools Technol. Transf. | Abbreviated Journal | |
| Volume | 8 | Issue | 4 | Pages | 397-409 |
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| Abstract | In this paper we present an explicit disk-based verification algorithm for Probabilistic Systems defining discrete time/finite state Markov Chains. Given a Markov Chain and an integer k (horizon), our algorithm checks whether the probability of reaching an error state in at most k steps is below a given threshold. We present an implementation of our algorithm within a suitable extension of the Mur$\varphi$ verifier. We call the resulting probabilistic model checker FHP-Mur$\varphi$ (Finite Horizon Probabilistic Mur$\varphi$). We present experimental results comparing FHP-Mur$\varphi$ with (a finite horizon subset of) PRISM, a state-of-the-art symbolic model checker for Markov Chains. Our experimental results show that FHP-Mur$\varphi$ can handle systems that are out of reach for PRISM, namely those involving arithmetic operations on the state variables (e.g. hybrid systems). | ||||
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| Publisher | Springer-Verlag | Place of Publication | Berlin, Heidelberg | Editor | |
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| Series Volume | Series Issue | Edition | |||
| ISSN | 1433-2779 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dimtz06 | Serial | 78 | ||
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| Author | Mancini, T. ; Mari, F.; Massini, A.; Melatti, I.; Salvo, I.; Tronci, E. | ||||
| Title | On minimising the maximum expected verification time | Type | Journal Article | ||
| Year | 2017 | Publication |
Information Processing Letters | Abbreviated Journal | |
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| Notes | Approved | no | |||
| Call Number | Sapienza @ mari @ | Serial | 163 | ||
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| Author | Mazzini, Silvia; Puri, Stefano; Mari, Federico; Melatti, Igor; Tronci, Enrico | ||||
| Title | Formal Verification at System Level | Type | Conference Article | ||
| Year | 2009 | Publication |
In: DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. Instanbul, Turkey, EuroSpace | Abbreviated Journal | |
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| Abstract | System Level Analysis calls for a language comprehensible to experts with different background and yet precise enough to support meaningful analyses. SysML is emerging as an effective balance between such conflicting goals. In this paper we outline some the results obtained as for SysML based system level functional formal verification by an ESA/ESTEC study, with a collaboration among INTECS and La Sapienza University of Roma. The study focuses on SysML based system level functional requirements techniques. | ||||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dasia09 | Serial | 20 | ||
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