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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Finite horizon analysis of Markov Chains with the Mur$\varphi$ verifier | Type | Journal Article | ||
| Year | 2006 | Publication | Int. J. Softw. Tools Technol. Transf. | Abbreviated Journal | |
| Volume | 8 | Issue | 4 | Pages | 397-409 |
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| Abstract | In this paper we present an explicit disk-based verification algorithm for Probabilistic Systems defining discrete time/finite state Markov Chains. Given a Markov Chain and an integer k (horizon), our algorithm checks whether the probability of reaching an error state in at most k steps is below a given threshold. We present an implementation of our algorithm within a suitable extension of the Mur$\varphi$ verifier. We call the resulting probabilistic model checker FHP-Mur$\varphi$ (Finite Horizon Probabilistic Mur$\varphi$). We present experimental results comparing FHP-Mur$\varphi$ with (a finite horizon subset of) PRISM, a state-of-the-art symbolic model checker for Markov Chains. Our experimental results show that FHP-Mur$\varphi$ can handle systems that are out of reach for PRISM, namely those involving arithmetic operations on the state variables (e.g. hybrid systems). | ||||
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| Publisher | Springer-Verlag | Place of Publication | Berlin, Heidelberg | Editor | |
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| ISSN | 1433-2779 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ Dimtz06 | Serial | 78 | ||
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| Author | Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa | ||||
| Title | Exploiting Transition Locality in Automatic Verification of Finite State Concurrent Systems | Type | Journal Article | ||
| Year | 2004 | Publication | Sttt | Abbreviated Journal | |
| Volume | 6 | Issue | 4 | Pages | 320-341 |
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| Abstract | In this paper we show that statistical properties of the transition graph of a system to be verified can be exploited to improve memory or time performances of verification algorithms. We show experimentally that protocols exhibit transition locality. That is, with respect to levels of a breadth-first state space exploration, state transitions tend to be between states belonging to close levels of the transition graph. We support our claim by measuring transition locality for the set of protocols included in the Mur$\varphi$ verifier distribution. We present a cache-based verification algorithm that exploits transition locality to decrease memory usage and a disk-based verification algorithm that exploits transition locality to decrease disk read accesses, thus reducing the time overhead due to disk usage. Both algorithms have been implemented within the Mur$\varphi$ verifier. Our experimental results show that our cache-based algorithm can typically save more than 40% of memory with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction, whereas our disk-based verification algorithm is typically more than ten times faster than a previously proposed disk-based verification algorithm and, even when using 10% of the memory needed to complete verification, it is only between 40 and 530% (300% on average) slower than (RAM) Mur$\varphi$ with enough memory to complete the verification task at hand. Using just 300 MB of memory our disk-based Mur$\varphi$ was able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 GB of memory using standard Mur$\varphi$. | ||||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ DIMTZ04j | Serial | 91 | ||
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| Author | Chierichetti, Flavio; Lattanzi, Silvio; Mari, Federico; Panconesi, Alessandro | ||||
| Title | On Placing Skips Optimally in Expectation | Type | Conference Article | ||
| Year | 2008 | Publication | Web Search and Web Data Mining (WSDM 2008) | Abbreviated Journal | |
| Volume | Issue | Pages | 15-24 | ||
| Keywords | Information Retrieval | ||||
| Abstract | We study the problem of optimal skip placement in an inverted list. Assuming the query distribution to be known in advance, we formally prove that an optimal skip placement can be computed quite efficiently. Our best algorithm runs in time O(n log n), n being the length of the list. The placement is optimal in the sense that it minimizes the expected time to process a query. Our theoretical results are matched by experiments with a real corpus, showing that substantial savings can be obtained with respect to the tra- ditional skip placement strategy, that of placing consecutive skips, each spanning sqrt(n) many locations. | ||||
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| Publisher | Acm | Place of Publication | Editor | Najork, M.; Broder, A.Z.; Chakrabarti, S. | |
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ ChiLatMar08 | Serial | 94 | ||
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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | On Model Based Synthesis of Embedded Control Software | Type | Report | ||
| Year | 2012 | Publication | Abbreviated Journal | ||
| Volume | abs/1207.4474 | Issue | Pages | ||
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| Abstract | Many Embedded Systems are indeed Software Based Control Systems (SBCSs), that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for control software. Given the formal model of a plant as a Discrete Time Linear Hybrid System and the implementation specifications (that is, number of bits in the Analog-to-Digital (AD) conversion) correct-by-construction control software can be automatically generated from System Level Formal Specifications of the closed loop system (that is, safety and liveness requirements), by computing a suitable finite abstraction of the plant.
With respect to given implementation specifications, the automatically generated code implements a time optimal control strategy (in terms of set-up time), has a Worst Case Execution Time linear in the number of AD bits $b$, but unfortunately, its size grows exponentially with respect to $b$. In many embedded systems, there are severe restrictions on the computational resources (such as memory or computational power) available to microcontroller devices. This paper addresses model based synthesis of control software by trading system level non-functional requirements (such us optimal set-up time, ripple) with software non-functional requirements (its footprint). Our experimental results show the effectiveness of our approach: for the inverted pendulum benchmark, by using a quantization schema with 12 bits, the size of the small controller is less than 6% of the size of the time optimal one. |
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| Publisher | CoRR, Technical Report | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ | Serial | 102 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Control Software Visualization | Type | Conference Article | ||
| Year | 2012 | Publication | Proceedings of INFOCOMP 2012, The Second International Conference on Advanced Communications and Computation | Abbreviated Journal | |
| Volume | Issue | Pages | 15-20 | ||
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| Publisher | ThinkMind | Place of Publication | Editor | ||
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| ISSN | 978-1-61208-226-4 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ infocomp2012 | Serial | 100 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Linear Constraints as a Modeling Language for Discrete Time Hybrid Systems | Type | Conference Article | ||
| Year | 2012 | Publication | Proceedings of ICSEA 2012, The Seventh International Conference on Software Engineering Advances | Abbreviated Journal | |
| Volume | Issue | Pages | 664-671 | ||
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| Publisher | ThinkMind | Place of Publication | Editor | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ icsea12 | Serial | 98 | ||
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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | On Model Based Synthesis of Embedded Control Software | Type | Conference Article | ||
| Year | 2012 | Publication | Proceedings of the 12th International Conference on Embedded Software, EMSOFT 2012, part of the Eighth Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12, 2012 | Abbreviated Journal | |
| Volume | Issue | Pages | 227-236 | ||
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| Publisher | ACM | Place of Publication | Editor | Ahmed Jerraya and Luca P. Carloni and Florence Maraninchi and John Regehr | |
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| ISSN | ISBN | 978-1-4503-1425-1 | Medium | ||
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| Notes | Techreport version can be found at arxiv.org | Approved | yes | ||
| Call Number | Sapienza @ mari @ emsoft12 | Serial | 97 | ||
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| Author | Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico | ||||
| Title | Automatic Control Software Synthesis for Quantized Discrete Time Hybrid Systems | Type | Conference Article | ||
| Year | 2012 | Publication | Proceedings of the 51th IEEE Conference on Decision and Control, CDC 2012, December 10-13, 2012, Maui, HI, USA | Abbreviated Journal | |
| Volume | Issue | Pages | 6120-6125 | ||
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| Publisher | IEEE | Place of Publication | Editor | ||
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| ISSN | ISBN | 978-1-4673-2065-8 | Medium | ||
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| Notes | Techreport version can be found at http://arxiv.org/abs/1207.4098 | Approved | yes | ||
| Call Number | Sapienza @ mari @ cdc12 | Serial | 96 | ||
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| Author | Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico; Alvisi, Lorenzo; Clement, Allen; Li, Harry | ||||
| Title | Model Checking Nash Equilibria in MAD Distributed Systems | Type | Conference Article | ||
| Year | 2008 | Publication | FMCAD '08: Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design | Abbreviated Journal | |
| Volume | Issue | Pages | 1-8 | ||
| Keywords | Model Checking, MAD Distributed System, Nash Equilibrium | ||||
| Abstract | We present a symbolic model checking algorithm for verification of Nash equilibria in finite state mechanisms modeling Multiple Administrative Domains (MAD) distributed systems. Given a finite state mechanism, a proposed protocol for each agent and an indifference threshold for rewards, our model checker returns PASS if the proposed protocol is a Nash equilibrium (up to the given indifference threshold) for the given mechanism, FAIL otherwise. We implemented our model checking algorithm inside the NuSMV model checker and present experimental results showing its effectiveness for moderate size mechanisms. For example, we can handle mechanisms which corresponding normal form games would have more than $10^20$ entries. To the best of our knowledge, no model checking algorithm for verification of mechanism Nash equilibria has been previously published. | ||||
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| Publisher | IEEE Press | Place of Publication | Piscataway, NJ, USA | Editor | Cimatti, A.; Jones, R. |
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| ISSN | 978-1-4244-2735-2 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ MarMelSalTroAlvCle08 | Serial | 93 | ||
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| Author | Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa | ||||
| Title | Exploiting Transition Locality in Automatic Verification | Type | Conference Article | ||
| Year | 2001 | Publication | 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) | Abbreviated Journal | |
| Volume | Issue | Pages | 259-274 | ||
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| Abstract | In this paper we present an algorithm to contrast state explosion when using Explicit State Space Exploration to verify protocols. We show experimentally that protocols exhibit transition locality. We present a verification algorithm that exploits transition locality as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm is compatible with all Breadth First (BF) optimization techniques present in the Mur$\varphi$ verifier and it is by no means a substitute for any of them. In fact, since our algorithm trades space with time, it is typically most useful when one runs out of memory and has already used all other state reduction techniques present in the Mur$\varphi$ verifier. Our experimental results show that using our approach we can typically save more than 40% of RAM with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction. | ||||
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| Publisher | Springer | Place of Publication | Livingston, Scotland, UK | Editor | Margaria, T.; Melham, T.F. |
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| Series Editor | Series Title | Lecture Notes in Computer Science | Abbreviated Series Title | ||
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2144 | Series Issue | Edition | ||
| ISSN | 3-540-42541-1 | ISBN | Medium | ||
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| Notes | Approved | yes | |||
| Call Number | Sapienza @ mari @ charme01 | Serial | 44 | ||
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