| Records |
| Author |
Ciancamerla, Ester; Minichino, Michele; Serro, Stefano; Tronci, Enrico |
| Title |
Automatic Timeliness Verification of a Public Mobile Network |
Type |
Conference Article |
| Year |
2003 |
Publication |
22nd International Conference on Computer Safety, Reliability, and Security (SAFECOMP) |
Abbreviated Journal |
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| Volume |
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Issue |
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Pages |
35-48 |
| Keywords |
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| Abstract |
This paper deals with the automatic verification of the timeliness of Public Mobile Network (PMN), consisting of Mobile Nodes (MNs) and Base Stations (BSs). We use the Mur$\varphi$ Model Checker to verify that the waiting access time of each MN, under different PMN configurations and loads, and different inter arrival times of MNs in a BS cell, is always below a preassigned threshold. Our experimental results show that Model Checking can be successfully used to generate worst case scenarios and nicely complements probabilistic methods and simulation which are typically used for performance evaluation. |
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Thesis |
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| Publisher |
Springer |
Place of Publication |
Edinburgh, UK |
Editor |
Anderson, S.; Felici, M.; Littlewood, B. |
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Summary Language |
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Series Title |
Lecture Notes in Computer Science |
Abbreviated Series Title  |
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| Series Volume |
2788 |
Series Issue |
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Edition |
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| ISSN |
978-3-540-20126-7 |
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Conference |
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| Notes |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ safecomp03 |
Serial |
38 |
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| Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
| Title |
Synchronized regular expressions |
Type |
Journal Article |
| Year |
2003 |
Publication |
Acta Inf. |
Abbreviated Journal |
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| Volume |
39 |
Issue |
1 |
Pages |
31-70 |
| Keywords |
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| Abstract |
Text manipulation is one of the most common tasks for everyone using a computer. The increasing number of textual information in electronic format that every computer user collects everyday also increases the need of more powerful tools to interact with texts. Indeed, much work has been done to provide simple and versatile tools that can be useful for the most common text manipulation tasks. Regular Expressions (RE), introduced by Kleene, are well known in the formal language theory. RE have been extended in various ways, depending on the application of interest. In almost all the implementations of RE search algorithms (e.g. the egrep [15] UNIX command, or the Perl [20] language pattern matching constructs) we find backreferences, i.e. expressions that make reference to the string matched by a previous subexpression. Generally speaking, it seems that all kinds of synchronizations between subexpressions in a RE can be very useful when interacting with texts. In this paper we introduce the Synchronized Regular Expressions (SRE) as an extension of the Regular Expressions. We use SRE to present a formal study of the already known backreferences extension, and of a new extension proposed by us, which we call the synchronized exponents. Moreover, since we are dealing with formalisms that should have a practical utility and be used in real applications, we have the problem of how to present SRE to the final users. Therefore, in this paper we also propose a user-friendly syntax for SRE to be used in implementations of SRE-powered search algorithms. |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ actainf03 |
Serial |
39 |
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| Author |
Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa |
| Title |
A Probabilistic Approach to Automatic Verification of Concurrent Systems |
Type |
Conference Article |
| Year |
2001 |
Publication |
8th Asia-Pacific Software Engineering Conference (APSEC) |
Abbreviated Journal |
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| Volume |
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Issue |
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Pages |
317-324 |
| Keywords |
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| Abstract |
The main barrier to automatic verification of concurrent systems is the huge amount of memory required to complete the verification task (state explosion). In this paper we present a probabilistic algorithm for automatic verification via model checking. Our algorithm trades space with time. In particular, when memory is full because of state explosion our algorithm does not give up verification. Instead it just proceeds at a lower speed and its results will only hold with some arbitrarily small error probability. Our preliminary experimental results show that by using our probabilistic algorithm we can typically save more than 30% of RAM with an average time penalty of about 100% w.r.t. a deterministic state space exploration with enough memory to complete the verification task. This is better than giving up the verification task because of lack of memory. |
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IEEE Computer Society |
Place of Publication |
Macau, China |
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| ISSN |
0-7695-1408-1 |
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Conference |
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| Notes |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ apsec01 |
Serial |
43 |
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| Author |
Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa |
| Title |
Exploiting Transition Locality in Automatic Verification |
Type |
Conference Article |
| Year |
2001 |
Publication |
11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) |
Abbreviated Journal |
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| Volume |
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Issue |
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Pages |
259-274 |
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| Abstract |
In this paper we present an algorithm to contrast state explosion when using Explicit State Space Exploration to verify protocols. We show experimentally that protocols exhibit transition locality. We present a verification algorithm that exploits transition locality as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm is compatible with all Breadth First (BF) optimization techniques present in the Mur$\varphi$ verifier and it is by no means a substitute for any of them. In fact, since our algorithm trades space with time, it is typically most useful when one runs out of memory and has already used all other state reduction techniques present in the Mur$\varphi$ verifier. Our experimental results show that using our approach we can typically save more than 40% of RAM with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction. |
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Thesis |
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| Publisher |
Springer |
Place of Publication |
Livingston, Scotland, UK |
Editor |
Margaria, T.; Melham, T.F. |
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Original Title |
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Series Title |
Lecture Notes in Computer Science |
Abbreviated Series Title |
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| Series Volume |
2144 |
Series Issue |
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Edition |
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| ISSN |
3-540-42541-1 |
ISBN |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ charme01 |
Serial |
44 |
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| Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
| Title |
Synchronized Regular Expressions |
Type |
Journal Article |
| Year |
2002 |
Publication |
Electr. Notes Theor. Comput. Sci. |
Abbreviated Journal |
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| Volume |
62 |
Issue |
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Pages |
195-210 |
| Keywords |
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| Abstract |
Text manipulation is one of the most common tasks for everyone using a computer. The increasing number of textual information in electronic format that every computer user collects everyday stresses the need of more powerful tools to interact with texts. Indeed, much work has been done to provide nonprogramming tools that can be useful for the most common text manipulation issues. Regular Expressions (RE), introduced by Kleene, are well–known in the formal language theory. RE received several extensions, depending on the application of interest. In almost all the implementations of RE search algorithms (e.g. the egrep [A] UNIX command, or the Perl [17] language pattern matching constructs) we find backreferences (as defind in [1]), i.e. expressions that make reference to the string matched by a previous subexpression. Generally speaking, it seems that all the kinds of synchronizations between subexpressions in a RE can be very useful when interacting with texts. Therefore, we introduce the Synchronized Regular Expressions (SRE) as a derivation of the Regular Expressions. We use SRE to present a formal study of the already known backreferences extension, and of a new extension proposed by us, which we call the synchronized exponents. Moreover, since we are talking about formalisms that should have a practical utility and can be used in the real world, we have the problem of how to present SRE to the final users. Therefore, in this paper we also propose a user–friendly syntax for SRE to be used in implementations of SRE–powered search algorithms. |
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| Notes |
TOSCA 2001, Theory of Concurrency, Higher Order Languages and Types |
Approved |
yes |
| Call Number |
Sapienza @ mari @ entcs02 |
Serial |
46 |
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| Author |
Focardi, Riccardo; Gorrieri, Roberto; Lanotte, Ruggero; Maggiolo-Schettini, Andrea; Martinelli, Fabio; Tini, Simone; Tronci, Enrico |
| Title |
Formal Models of Timing Attacks on Web Privacy |
Type |
Journal Article |
| Year |
2002 |
Publication |
Electronic Notes in Theoretical Computer Science |
Abbreviated Journal |
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| Volume |
62 |
Issue |
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Pages |
229-243 |
| Keywords |
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| Abstract |
We model a timing attack on web privacy proposed by Felten and Schneider by using three different approaches: HL-Timed Automata, SMV model checker, and tSPA Process Algebra. Some comparative analysis on the three approaches is derived. |
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| Notes |
TOSCA 2001, Theory of Concurrency, Higher Order Languages and Types |
Approved |
yes |
| Call Number |
Sapienza @ mari @ entcs02a |
Serial |
47 |
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| Author |
Tronci, Enrico |
| Title |
Automatic Synthesis of Control Software for an Industrial Automation Control System |
Type |
Conference Article |
| Year |
1999 |
Publication |
Proc.of: 14th IEEE International Conference on: Automated Software Engineering (ASE) |
Abbreviated Journal |
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| Volume |
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Issue |
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Pages |
247-250 |
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| Abstract |
We present a case study on automatic synthesis of control software from formal specifications for an industrial automation control system. Our aim is to compare the effectiveness (i.e. design effort and controller quality) of automatic controller synthesis from closed loop formal specifications with that of manual controller design, followed by automatic verification. Our experimental results show that for industrial automation control systems, automatic synthesis is a viable and profitable (especially as far as design effort is concerned) alternative to manual design, followed by automatic verification. |
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Place of Publication |
Cocoa Beach, Florida, USA |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ ase99 |
Serial |
49 |
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| Author |
Tronci, Enrico |
| Title |
Formally Modeling a Metal Processing Plant and its Closed Loop Specifications |
Type |
Conference Article |
| Year |
1999 |
Publication |
4th IEEE International Symposium on High-Assurance Systems Engineering (HASE) |
Abbreviated Journal |
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| Volume |
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Issue |
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Pages |
151 |
| Keywords |
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| Abstract |
We present a case study on automatic synthesis of control software from formal specifications for an industrial automation control system. Our aim is to compare the effectiveness (i.e. design effort and controller quality) of automatic controller synthesis from closed loop formal specifications with that of manual controller design followed by automatic verification. The system to be controlled (plant) models a metal processing facility near Karlsruhe. We succeeded in automatically generating C code implementing a (correct by construction) embedded controller for such a plant from closed loop formal specifications. Our experimental results show that for industrial automation control systems automatic synthesis is a viable and profitable (especially as far as design effort is concerned) alternative to manual design followed by automatic verification. |
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| Publisher |
IEEE Computer Society |
Place of Publication |
Washington, D.C, USA |
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Edition |
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| ISSN |
0-7695-0418-3 |
ISBN |
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Conference |
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| Notes |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ hase99 |
Serial |
50 |
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| Author |
Fantechi, Alessandro; Gnesi, Stefania; Mazzanti, Franco; Pugliese, Rosario; Tronci, Enrico |
| Title |
A Symbolic Model Checker for ACTL |
Type |
Conference Article |
| Year |
1998 |
Publication |
International Workshop on Current Trends in Applied Formal Method (FM-Trends) |
Abbreviated Journal |
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Issue |
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Pages |
228-242 |
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| Abstract |
We present SAM, a symbolic model checker for ACTL, the action-based version of CTL. SAM relies on implicit representations of Labeled Transition Systems (LTSs), the semantic domain for ACTL formulae, and uses symbolic manipulation algorithms. SAM has been realized by translating (networks of) LTSs and, possibly recursive, ACTL formulae into BSP (Boolean Symbolic Programming), a programming language aiming at defining computations on boolean functions, and by using the BSP interpreter to carry out computations (i.e. verifications). |
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Springer |
Place of Publication |
Boppard, Germany |
Editor |
Hutter, D.; Stephan, W.; Traverso, P.; Ullmann, M. |
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Series Title |
Lecture Notes in Computer Science |
Abbreviated Series Title |
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| Series Volume |
1641 |
Series Issue |
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Edition |
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| ISSN |
3-540-66462-9 |
ISBN |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ fm-trends98 |
Serial |
51 |
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| Author |
Tronci, Enrico |
| Title |
Automatic Synthesis of Controllers from Formal Specifications |
Type |
Conference Article |
| Year |
1998 |
Publication |
Proc of 2nd IEEE International Conference on Formal Engineering Methods (ICFEM) |
Abbreviated Journal |
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Issue |
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Pages |
134-143 |
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| Abstract |
Many safety critical reactive systems are indeed embedded control systems. Usually a control system can be partitioned into two main subsystems: a controller and a plant. Roughly speaking: the controller observes the state of the plant and sends commands (stimulus) to the plant to achieve predefined goals. We show that when the plant can be modeled as a deterministic finite state system (FSS) it is possible to effectively use formal methods to automatically synthesize the program implementing the controller from the plant model and the given formal specifications for the closed loop system (plant+controller). This guarantees that the controller program is correct by construction. To the best of our knowledge there is no previously published effective algorithm to extract executable code for the controller from closed loop formal specifications. We show practical usefulness of our techniques by giving experimental results on their use to synthesize C programs implementing optimal controllers (OCs) for plants with more than 109 states. |
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Place of Publication |
Brisbane, Queensland, Australia |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ icfem98 |
Serial |
52 |
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