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	Author	Verzino Giovanni ; Cavaliere, Federico; Mari, Federico; Melatti, Igor; Minei, Giovanni; Salvo, Ivano; Yushtein, Yuri; Tronci, Enrico
	Title	Model checking driven simulation of sat procedures			Type	Conference Article
	Year	2012	Publication	Proceedings of 12th International Conference on Space Operations (SpaceOps 2012)	Abbreviated Journal	International Conference on Space Operations
	Volume		Issue		Pages
	Keywords
	Abstract
	Address
	Corporate Author				Thesis
	Publisher		Place of Publication		Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN		ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	no
	Call Number	Sapienza @ melatti @			Serial	117
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	Author	Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa
	Title	A Probabilistic Approach to Automatic Verification of Concurrent Systems			Type	Conference Article
	Year	2001	Publication	8th Asia-Pacific Software Engineering Conference (APSEC)	Abbreviated Journal
	Volume		Issue		Pages	317-324
	Keywords
	Abstract	The main barrier to automatic verification of concurrent systems is the huge amount of memory required to complete the verification task (state explosion). In this paper we present a probabilistic algorithm for automatic verification via model checking. Our algorithm trades space with time. In particular, when memory is full because of state explosion our algorithm does not give up verification. Instead it just proceeds at a lower speed and its results will only hold with some arbitrarily small error probability. Our preliminary experimental results show that by using our probabilistic algorithm we can typically save more than 30% of RAM with an average time penalty of about 100% w.r.t. a deterministic state space exploration with enough memory to complete the verification task. This is better than giving up the verification task because of lack of memory.
	Address
	Corporate Author				Thesis
	Publisher	IEEE Computer Society	Place of Publication	Macau, China	Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN	0-7695-1408-1	ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ apsec01			Serial	43
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	Author	Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa
	Title	Exploiting Transition Locality in Automatic Verification			Type	Conference Article
	Year	2001	Publication	11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME)	Abbreviated Journal
	Volume		Issue		Pages	259-274
	Keywords
	Abstract	In this paper we present an algorithm to contrast state explosion when using Explicit State Space Exploration to verify protocols. We show experimentally that protocols exhibit transition locality. We present a verification algorithm that exploits transition locality as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm is compatible with all Breadth First (BF) optimization techniques present in the Mur$\varphi$ verifier and it is by no means a substitute for any of them. In fact, since our algorithm trades space with time, it is typically most useful when one runs out of memory and has already used all other state reduction techniques present in the Mur$\varphi$ verifier. Our experimental results show that using our approach we can typically save more than 40% of RAM with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction.
	Address
	Corporate Author				Thesis
	Publisher	Springer	Place of Publication	Livingston, Scotland, UK	Editor	Margaria, T.; Melham, T.F.
	Language		Summary Language		Original Title
	Series Editor		Series Title	Lecture Notes in Computer Science	Abbreviated Series Title
	Series Volume	2144	Series Issue		Edition
	ISSN	3-540-42541-1	ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ charme01			Serial	44
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	Author	Tronci, Enrico
	Title	Introductory Paper			Type	Journal Article
	Year	2006	Publication	Sttt	Abbreviated Journal
	Volume	8	Issue	4-5	Pages	355-358
	Keywords
	Abstract	In todayÃ¢â‚¬â„¢s competitive market designing of digital systems (hardware as well as software) faces tremendous challenges. In fact, notwithstanding an ever decreasing project budget, time to market and product lifetime, designers are faced with an ever increasing system complexity and customer expected quality. The above situation calls for better and better formal verification techniques at all steps of the design flow. This special issue is devoted to publishing revised versions of contributions first presented at the 12th Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) held 21Ã‚â€“24 October 2003 in LÃ¢â‚¬â„¢Aquila, Italy. Authors of well regarded papers from CHARMEÃ¢â‚¬â„¢03 were invited to submit to this special issue. All papers included here have been suitably extended and have undergone an independent round of reviewing.
	Address
	Corporate Author				Thesis
	Publisher		Place of Publication		Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN		ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ sttt06			Serial	30
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	Author	Tronci, Enrico
	Title	Automatic Synthesis of Control Software for an Industrial Automation Control System			Type	Conference Article
	Year	1999	Publication	Proc.of: 14th IEEE International Conference on: Automated Software Engineering (ASE)	Abbreviated Journal
	Volume		Issue		Pages	247-250
	Keywords
	Abstract	We present a case study on automatic synthesis of control software from formal specifications for an industrial automation control system. Our aim is to compare the effectiveness (i.e. design effort and controller quality) of automatic controller synthesis from closed loop formal specifications with that of manual controller design, followed by automatic verification. Our experimental results show that for industrial automation control systems, automatic synthesis is a viable and profitable (especially as far as design effort is concerned) alternative to manual design, followed by automatic verification.
	Address
	Corporate Author				Thesis
	Publisher		Place of Publication	Cocoa Beach, Florida, USA	Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN		ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ ase99			Serial	49
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	Author	Tronci, Enrico
	Title	Formally Modeling a Metal Processing Plant and its Closed Loop Specifications			Type	Conference Article
	Year	1999	Publication	4th IEEE International Symposium on High-Assurance Systems Engineering (HASE)	Abbreviated Journal
	Volume		Issue		Pages	151
	Keywords
	Abstract	We present a case study on automatic synthesis of control software from formal specifications for an industrial automation control system. Our aim is to compare the effectiveness (i.e. design effort and controller quality) of automatic controller synthesis from closed loop formal specifications with that of manual controller design followed by automatic verification. The system to be controlled (plant) models a metal processing facility near Karlsruhe. We succeeded in automatically generating C code implementing a (correct by construction) embedded controller for such a plant from closed loop formal specifications. Our experimental results show that for industrial automation control systems automatic synthesis is a viable and profitable (especially as far as design effort is concerned) alternative to manual design followed by automatic verification.
	Address
	Corporate Author				Thesis
	Publisher	IEEE Computer Society	Place of Publication	Washington, D.C, USA	Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN	0-7695-0418-3	ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ hase99			Serial	50
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	Author	Tronci, Enrico
	Title	Automatic Synthesis of Controllers from Formal Specifications			Type	Conference Article
	Year	1998	Publication	Proc of 2nd IEEE International Conference on Formal Engineering Methods (ICFEM)	Abbreviated Journal
	Volume		Issue		Pages	134-143
	Keywords
	Abstract	Many safety critical reactive systems are indeed embedded control systems. Usually a control system can be partitioned into two main subsystems: a controller and a plant. Roughly speaking: the controller observes the state of the plant and sends commands (stimulus) to the plant to achieve predefined goals. We show that when the plant can be modeled as a deterministic finite state system (FSS) it is possible to effectively use formal methods to automatically synthesize the program implementing the controller from the plant model and the given formal specifications for the closed loop system (plant+controller). This guarantees that the controller program is correct by construction. To the best of our knowledge there is no previously published effective algorithm to extract executable code for the controller from closed loop formal specifications. We show practical usefulness of our techniques by giving experimental results on their use to synthesize C programs implementing optimal controllers (OCs) for plants with more than 109 states.
	Address
	Corporate Author				Thesis
	Publisher		Place of Publication	Brisbane, Queensland, Australia	Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN		ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ icfem98			Serial	52
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	Author	Tronci, Enrico
	Title	Equational Programming in Lambda-Calculus via SL-Systems. Part 1			Type	Journal Article
	Year	1996	Publication	Theoretical Computer Science	Abbreviated Journal
	Volume	160	Issue	1&2	Pages	145-184
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	Abstract
	Address
	Corporate Author				Thesis
	Publisher		Place of Publication		Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN		ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ tcs96			Serial	54
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	Author	Tronci, Enrico
	Title	Equational Programming in Lambda-Calculus via SL-Systems. Part 2			Type	Journal Article
	Year	1996	Publication	Theoretical Computer Science	Abbreviated Journal
	Volume	160	Issue	1&2	Pages	185-216
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	Abstract
	Address
	Corporate Author				Thesis
	Publisher		Place of Publication		Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN		ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ tcs96a			Serial	55
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	Author	Tronci, Enrico
	Title	Hardware Verification, Boolean Logic Programming, Boolean Functional Programming			Type	Conference Article
	Year	1995	Publication	Tenth Annual IEEE Symposium on Logic in Computer Science (LICS)	Abbreviated Journal
	Volume		Issue		Pages	408-418
	Keywords
	Abstract	One of the main obstacles to automatic verification of finite state systems (FSSs) is state explosion. In this respect automatic verification of an FSS M using model checking and binary decision diagrams (BDDs) has an intrinsic limitation: no automatic global optimization of the verification task is possible until a BDD representation for M is generated. This is because systems and specifications are defined using different languages. To perform global optimization before generating a BDD representation for M we propose to use the same language to define systems and specifications. We show that first order logic on a Boolean domain yields an efficient functional programming language that can be used to represent, specify and automatically verify FSSs, e.g. on a SUN Sparc Station 2 we were able to automatically verify a 64 bit commercial multiplier.
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	Corporate Author				Thesis
	Publisher	IEEE Computer Society	Place of Publication	San Diego, California	Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN		ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ lics95			Serial	56
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