| Records |
Author  |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
| Title |
Exploiting Transition Locality in the Disk Based Mur$\varphi$ Verifier |
Type |
Conference Article |
| Year |
2002 |
Publication |
4th International Conference on Formal Methods in Computer-Aided Design (FMCAD) |
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| Volume |
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Issue |
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Pages |
202-219 |
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| Abstract |
The main obstruction to automatic verification of Finite State Systems is the huge amount of memory required to complete the verification task (state explosion). This motivates research on distributed as well as disk based verification algorithms. In this paper we present a disk based Breadth First Explicit State Space Exploration algorithm as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm exploits transition locality (i.e. the statistical fact that most transitions lead to unvisited states or to recently visited states) to decrease disk read accesses thus reducing the time overhead due to disk usage. A disk based verification algorithm for Mur$\varphi$ has been already proposed in the literature. To measure the time speed up due to locality exploitation we compared our algorithm with such previously proposed algorithm. Our experimental results show that our disk based verification algorithm is typically more than 10 times faster than such previously proposed disk based verification algorithm. To measure the time overhead due to disk usage we compared our algorithm with RAM based verification using the (standard) Mur$\varphi$ verifier with enough memory to complete the verification task. Our experimental results show that even when using 1/10 of the RAM needed to complete verification, our disk based algorithm is only between 1.4 and 5.3 times (3 times on average) slower than (RAM) Mur$\varphi$ with enough RAM memory to complete the verification task at hand. Using our disk based Mur$\varphi$ we were able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 gigabytes of RAM using RAM based Mur$\varphi$. |
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Springer |
Place of Publication |
Portland, OR, USA |
Editor |
Aagaard, M.; O'Leary, J.W. |
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Lecture Notes in Computer Science |
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| Series Volume |
2517 |
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| ISSN |
3-540-00116-6 |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ fmcad02 |
Serial |
41 |
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| Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
| Title |
Synchronized Regular Expressions |
Type |
Journal Article |
| Year |
2002 |
Publication |
Electr. Notes Theor. Comput. Sci. |
Abbreviated Journal |
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| Volume |
62 |
Issue |
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Pages |
195-210 |
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| Abstract |
Text manipulation is one of the most common tasks for everyone using a computer. The increasing number of textual information in electronic format that every computer user collects everyday stresses the need of more powerful tools to interact with texts. Indeed, much work has been done to provide nonprogramming tools that can be useful for the most common text manipulation issues. Regular Expressions (RE), introduced by Kleene, are well–known in the formal language theory. RE received several extensions, depending on the application of interest. In almost all the implementations of RE search algorithms (e.g. the egrep [A] UNIX command, or the Perl [17] language pattern matching constructs) we find backreferences (as defind in [1]), i.e. expressions that make reference to the string matched by a previous subexpression. Generally speaking, it seems that all the kinds of synchronizations between subexpressions in a RE can be very useful when interacting with texts. Therefore, we introduce the Synchronized Regular Expressions (SRE) as a derivation of the Regular Expressions. We use SRE to present a formal study of the already known backreferences extension, and of a new extension proposed by us, which we call the synchronized exponents. Moreover, since we are talking about formalisms that should have a practical utility and can be used in the real world, we have the problem of how to present SRE to the final users. Therefore, in this paper we also propose a user–friendly syntax for SRE to be used in implementations of SRE–powered search algorithms. |
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TOSCA 2001, Theory of Concurrency, Higher Order Languages and Types |
Approved |
yes |
| Call Number |
Sapienza @ mari @ entcs02 |
Serial |
46 |
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| Author |
Della Penna, Giuseppe; Magazzeni, Daniele; Tofani, Alberto; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico |
| Title |
Automated Generation Of Optimal Controllers Through Model Checking Techniques |
Type |
Book Chapter |
| Year |
2008 |
Publication |
Informatics in Control Automation and Robotics. Selected Papers from ICINCO 2006 |
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Pages |
107-119 |
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Springer |
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yes |
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Sapienza @ mari @ Dmtmt08 |
Serial |
26 |
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| Author |
Della Penna, Giuseppe; Magazzeni, Daniele; Tofani, Alberto; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico |
| Title |
Automatic Synthesis of Robust Numerical Controllers |
Type |
Conference Article |
| Year |
2007 |
Publication |
Icas '07 |
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Issue |
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Pages |
4 |
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| Abstract |
A major problem of numerical controllers is their robustness, i.e. the state read from the plant may not be in the controller table, although it may be close to some states in the table. For continuous systems, this problem is typically handled by interpolation techniques. Unfortunately, when the plant contains both continuous and discrete variables, the interpolation approach does not work well. To cope with this kind of systems, we propose a general methodology that exploits explicit model checking in an innovative way to automatically synthesize a (time-) optimal numerical controller from a plant specification and apply an optimized strengthening algorithm only on the most significant states, in order to reach an acceptable robustness degree. We implemented all the algorithms within our CGMurphi tool, an extension of the well-known CMurphi verifier, and tested the effectiveness of our approach by applying it to the well-known truck and trailer obstacles avoidance problem. |
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IEEE Computer Society |
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0-7695-2859-5 |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ Dmtimt07 |
Serial |
89 |
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| Author |
Della Penna, Giuseppe; Magazzeni, Daniele; Tofani, Alberto; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico |
| Title |
Automated Generation of Optimal Controllers through Model Checking Techniques |
Type |
Conference Article |
| Year |
2006 |
Publication |
Icinco-Icso |
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26-33 |
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We present a methodology for the synthesis of controllers, which exploits (explicit) model checking techniques. That is, we can cope with the systematic exploration of a very large state space. This methodology can be applied to systems where other approaches fail. In particular, we can consider systems with an highly non-linear dynamics and lacking a uniform mathematical description (model). We can also consider situations where the required control action cannot be specified as a local action, and rather a kind of planning is required. Our methodology individuates first a raw optimal controller, then extends it to obtain a more robust one. A case study is presented which considers the well known truck-trailer obstacle avoidance parking problem, in a parking lot with obstacles on it. The complex non-linear dynamics of the truck-trailer system, within the presence of obstacles, makes the parking problem extremely hard. We show how, by our methodology, we can obtain optimal controllers with different degrees of robustness. |
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INSTICC Press |
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Andrade-Cetto, J.; Ferrier, J.-L.; Pereira, J. M. C. D.; Filipe, J. |
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972-8865-59-7 |
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yes |
| Call Number |
Sapienza @ mari @ Dimmtt06 |
Serial |
79 |
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| Author |
Della Penna, Giuseppe; Tofani, Alberto; Pecorari, Marcello; Raparelli, Orazio; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico |
| Title |
A Case Study on Automated Generation of Integration Tests |
Type |
Conference Article |
| Year |
2006 |
Publication |
Fdl |
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278-284 |
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Ecsi |
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978-3-00-019710-9 |
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Approved |
yes |
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Sapienza @ mari @ Dtprimt06 |
Serial |
27 |
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| Author |
Dipoppa, G.; D'Alessandro, G.; Semprini, R.; Tronci, E. |
| Title |
Integrating Automatic Verification of Safety Requirements in Railway Interlocking System Design |
Type |
Conference Article |
| Year |
2001 |
Publication |
High Assurance Systems Engineering, 2001. Sixth IEEE International Symposium on |
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Issue |
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Pages |
209-219 |
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A railway interlocking system (RIS) is an embedded system (namely a supervisory control system) that ensures the safe, operation of the devices in a railway station. RIS is a safety critical system. We explore the possibility of integrating automatic formal verification methods in a given industry RIS design flow. The main obstructions to be overcome in our work are: selecting a formal verification tool that is efficient enough to solve the verification problems at hand; and devising a cost effective integration strategy for such tool. We were able to devise a successful integration strategy meeting the above constraints without requiring major modification in the pre-existent design flow nor retraining of personnel. We run verification experiments for a RIS designed for the Singapore Subway. The experiments show that the RIS design flow obtained from our integration strategy is able to automatically verify real life RIS designs. |
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IEEE Computer Society |
Place of Publication |
Albuquerque, NM, USA |
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0-7695-1275-5 |
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Approved |
yes |
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Sapienza @ mari @ hase01 |
Serial |
45 |
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| Author |
Driouich, Y.; Parente, M.; Tronci, E. |
| Title |
A methodology for a complete simulation of Cyber-Physical Energy Systems |
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Conference Article |
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2018 |
Publication |
EESMS 2018 – Environmental, Energy, and Structural Monitoring Systems, Proceedings |
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1-5 |
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no |
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MCLab @ davi @ Driouich20181 |
Serial |
169 |
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| Author |
Driouich, Y.; Parente, M.; Tronci, E. |
| Title |
Model Checking Cyber-Physical Energy Systems |
Type |
Conference Article |
| Year |
2018 |
Publication |
Proceedings of 2017 International Renewable and Sustainable Energy Conference, IRSEC 2017 |
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Institute of Electrical and Electronics Engineers Inc. |
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no |
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MCLab @ davi @ Driouich2018 |
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177 |
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| Author |
Driouich, Y.; Parente, M.; Tronci, E. |
| Title |
Modeling cyber-physical systems for automatic verification |
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Conference Article |
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2017 |
Publication |
14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD 2017) |
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1-4 |
| Keywords |
cyber-physical systems;formal verification;maximum power point trackers;power engineering computing;Modelica;automatic verification;complex power electronics systems;cyber-physical systems modeling;distributed maximum power point tracking system;open standard modeling language;Computational modeling;Control systems;Integrated circuit modeling;Mathematical model;Maximum power point trackers;Object oriented modeling;Radiation effects;Automatic Formal Verification;Cyber-Physical Systems;DMPPT;Modeling;Photovoltaic systems;Simulation;System Analysis and Design |
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MCLab @ davi @ ref7981621 |
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168 |
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