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Author Cavaliere, Federico; Mari, Federico; Melatti, Igor; Minei, Giovanni; Salvo, Ivano; Tronci, Enrico; Verzino, Giovanni; Yushtein, Yuri
Title Model Checking Satellite Operational Procedures Type Conference Article
Year 2011 Publication DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. San Anton, Malta, EuroSpace. Abbreviated Journal
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Abstract We present a model checking approach for the automatic verification of satellite operational procedures (OPs). Building a model for a complex system as a satellite is a hard task. We overcome this obstruction by using a suitable simulator (SIMSAT) for the satellite. Our approach aims at improving OP quality assurance by automatic exhaustive exploration of all possible simulation scenarios. Moreover, our solution decreases OP verification costs by using a model checker (CMurphi) to automatically drive the simulator. We model OPs as user-executed programs observing the simulator telemetries and sending telecommands to the simulator. In order to assess feasibility of our approach we present experimental results on a simple meaningful scenario. Our results show that we can save up to 90% of verification time.
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Notes Approved yes
Call Number Sapienza @ mari @ Dasia11 Serial 13
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Author Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico
Title From Boolean Relations to Control Software Type Conference Article
Year 2011 Publication Proceedings of ICSEA 2011, The Sixth International Conference on Software Engineering Advances Abbreviated Journal
Volume Issue Pages 528-533
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Abstract Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F.
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Publisher ThinkMind Place of Publication Editor (up)
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ISSN 978-1-61208-165-6 ISBN Medium
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Notes Best Paper Award Approved yes
Call Number Sapienza @ mari @ icsea11 Serial 14
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Author Cesta, Amedeo; Fratini, Simone; Orlandini, Andrea; Finzi, Alberto; Tronci, Enrico
Title Flexible Plan Verification: Feasibility Results Type Journal Article
Year 2011 Publication Fundamenta Informaticae Abbreviated Journal
Volume 107 Issue 2 Pages 111-137
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Call Number Sapienza @ mari @ fi11 Serial 15
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Author Bobbio, Andrea; Ciancamerla, Ester; Di Blasi, Saverio; Iacomini, Alessandro; Mari, Federico; Melatti, Igor; Minichino, Michele; Scarlatti, Alessandro; Tronci, Enrico; Terruggia, Roberta; Zendri, Emilio
Title Risk analysis via heterogeneous models of SCADA interconnecting Power Grids and Telco networks Type Conference Article
Year 2009 Publication Proceedings of Fourth International Conference on Risks and Security of Internet and Systems (CRiSIS) Abbreviated Journal
Volume Issue Pages 90-97
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Abstract The automation of power grids by means of supervisory control and data acquisition (SCADA) systems has led to an improvement of power grid operations and functionalities but also to pervasive cyber interdependencies between power grids and telecommunication networks. Many power grid services are increasingly depending upon the adequate functionality of SCADA system which in turn strictly depends on the adequate functionality of its communication infrastructure. We propose to tackle the SCADA risk analysis by means of different and heterogeneous modeling techniques and software tools. We demonstrate the applicability of our approach through a case study on an actual SCADA system for an electrical power distribution grid. The modeling techniques we discuss aim at providing a probabilistic dependability analysis, followed by a worst case analysis in presence of malicious attacks and a real-time performance evaluation.
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Area Expedition Conference Fourth International Conference on Risks and Security of Internet and Systems (CRiSIS)
Notes Approved yes
Call Number Sapienza @ mari @ crisis09 Serial 17
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Author Cesta, Amedeo; Finzi, Alberto; Fratini, Simone; Orlandini, Andrea; Tronci, Enrico
Title Validation and verification issues in a timeline-based planning system Type Journal Article
Year 2010 Publication The Knowledge Engineering Review Abbreviated Journal
Volume 25 Issue 03 Pages 299-318
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Abstract One of the key points to take into account to foster effective introduction of AI planning and scheduling systems in real world is to develop end user trust in the related technologies. Automated planning and scheduling systems often brings solutions to the users which are neither “obvious†nor immediately acceptable for them. This is due to the ability of these tools to take into account quite an amount of temporal and causal constraints and to employ resolution processes often designed to optimize the solution with respect to non trivial evaluation functions. To increase technology trust, the study of tools for verifying and validating plans and schedules produced by AI systems might be instrumental. In general, validation and verification techniques represent a needed complementary technology in developing domain independent architectures for automated problem solving. This paper presents a preliminary report of the issues concerned with the use of two software tools for formal verification of finite state systems to the validation of the solutions produced by MrSPOCK, a recent effort for building a timeline based planning tool in an ESA project.
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Publisher Cambridge University Press Place of Publication Editor (up)
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Notes Approved yes
Call Number Sapienza @ mari @ Cffot10 Serial 18
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Author Mazzini, Silvia; Puri, Stefano; Mari, Federico; Melatti, Igor; Tronci, Enrico
Title Formal Verification at System Level Type Conference Article
Year 2009 Publication In: DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. Instanbul, Turkey, EuroSpace Abbreviated Journal
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Abstract System Level Analysis calls for a language comprehensible to experts with different background and yet precise enough to support meaningful analyses. SysML is emerging as an effective balance between such conflicting goals. In this paper we outline some the results obtained as for SysML based system level functional formal verification by an ESA/ESTEC study, with a collaboration among INTECS and La Sapienza University of Roma. The study focuses on SysML based system level functional requirements techniques.
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Notes Approved yes
Call Number Sapienza @ mari @ Dasia09 Serial 20
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Author Cesta, Amedeo; Finzi, Alberto; Fratini, Simone; Orlandini, Andrea; Tronci, Enrico
Title Flexible Plan Verification: Feasibility Results Type Conference Article
Year 2009 Publication 16th RCRA International Workshop on “Experimental evaluation of algorithms for solving problems with combinatorial explosion” (RCRA). Proceedings Abbreviated Journal
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Call Number Sapienza @ mari @ Rcra09 Serial 22
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Author Bobbio, Andrea; Ciancamerla, Ester; Minichino, Michele; Tronci, Enrico
Title Functional analysis of a telecontrol system and stochastic measures of its GSM/GPRS connections Type Journal Article
Year 2005 Publication Archives of Transport – International Journal of Transport Problems Abbreviated Journal
Volume 17 Issue 3-4 Pages
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Notes Approved yes
Call Number Sapienza @ mari @ jtp05 Serial 31
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Author Gribaudo, Marco; Horváth, Andras; Bobbio, Andrea; Tronci, Enrico; Ciancamerla, Ester; Minichino, Michele
Title Fluid Petri Nets and hybrid model checking: a comparative case study Type Journal Article
Year 2003 Publication Int. Journal on: Reliability Engineering & System Safety Abbreviated Journal
Volume 81 Issue 3 Pages 239-257
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Abstract The modeling and analysis of hybrid systems is a recent and challenging research area which is actually dominated by two main lines: a functional analysis based on the description of the system in terms of discrete state (hybrid) automata (whose goal is to ascertain conformity and reachability properties), and a stochastic analysis (whose aim is to provide performance and dependability measures). This paper investigates a unifying view between formal methods and stochastic methods by proposing an analysis methodology of hybrid systems based on Fluid Petri Nets (FPNs). FPNs can be analyzed directly using appropriate tools. Our paper shows that the same FPN model can be fed to different functional analyzers for model checking. In order to extensively explore the capability of the technique, we have converted the original FPN into languages for discrete as well as hybrid as well as stochastic model checkers. In this way, a first comparison among the modeling power of well known tools can be carried out. Our approach is illustrated by means of a ’real world’ hybrid system: the temperature control system of a co-generative plant.
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Publisher Elsevier Place of Publication Editor (up)
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Notes Approved yes
Call Number Sapienza @ mari @ ress03 Serial 40
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Author Dipoppa, G.; D'Alessandro, G.; Semprini, R.; Tronci, E.
Title Integrating Automatic Verification of Safety Requirements in Railway Interlocking System Design Type Conference Article
Year 2001 Publication High Assurance Systems Engineering, 2001. Sixth IEEE International Symposium on Abbreviated Journal
Volume Issue Pages 209-219
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Abstract A railway interlocking system (RIS) is an embedded system (namely a supervisory control system) that ensures the safe, operation of the devices in a railway station. RIS is a safety critical system. We explore the possibility of integrating automatic formal verification methods in a given industry RIS design flow. The main obstructions to be overcome in our work are: selecting a formal verification tool that is efficient enough to solve the verification problems at hand; and devising a cost effective integration strategy for such tool. We were able to devise a successful integration strategy meeting the above constraints without requiring major modification in the pre-existent design flow nor retraining of personnel. We run verification experiments for a RIS designed for the Singapore Subway. The experiments show that the RIS design flow obtained from our integration strategy is able to automatically verify real life RIS designs.
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Publisher IEEE Computer Society Place of Publication Albuquerque, NM, USA Editor (up)
Language Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
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ISSN 0-7695-1275-5 ISBN Medium
Area Expedition Conference
Notes Approved yes
Call Number Sapienza @ mari @ hase01 Serial 45
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