| Records |
| Author |
|
| Title |
Charme |
Type |
Conference Article |
| Year |
2003 |
Publication |
Lecture Notes in Computer Science |
Abbreviated Journal |
|
| Volume |
2860 |
Issue  |
|
Pages |
|
| Keywords |
|
| Abstract |
|
| Address |
|
| Corporate Author |
|
Thesis |
|
| Publisher |
Springer |
Place of Publication |
|
Editor |
Geist, D.; Tronci, E. |
| Language |
|
Summary Language |
|
Original Title |
|
| Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
| Series Volume |
|
Series Issue |
|
Edition |
|
| ISSN |
3-540-20363-X |
ISBN |
|
Medium |
|
| Area |
|
Expedition |
|
Conference |
|
| Notes |
|
Approved |
yes |
| Call Number |
Sapienza @ mari @ editor-charme03 |
Serial |
37 |
| Permanent link to this record |
| |
|
| |
| Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
| Title |
Exploiting Transition Locality in the Disk Based Mur$\varphi$ Verifier |
Type |
Conference Article |
| Year |
2002 |
Publication |
4th International Conference on Formal Methods in Computer-Aided Design (FMCAD) |
Abbreviated Journal |
|
| Volume |
|
Issue |
|
Pages |
202-219 |
| Keywords |
|
| Abstract |
The main obstruction to automatic verification of Finite State Systems is the huge amount of memory required to complete the verification task (state explosion). This motivates research on distributed as well as disk based verification algorithms. In this paper we present a disk based Breadth First Explicit State Space Exploration algorithm as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm exploits transition locality (i.e. the statistical fact that most transitions lead to unvisited states or to recently visited states) to decrease disk read accesses thus reducing the time overhead due to disk usage. A disk based verification algorithm for Mur$\varphi$ has been already proposed in the literature. To measure the time speed up due to locality exploitation we compared our algorithm with such previously proposed algorithm. Our experimental results show that our disk based verification algorithm is typically more than 10 times faster than such previously proposed disk based verification algorithm. To measure the time overhead due to disk usage we compared our algorithm with RAM based verification using the (standard) Mur$\varphi$ verifier with enough memory to complete the verification task. Our experimental results show that even when using 1/10 of the RAM needed to complete verification, our disk based algorithm is only between 1.4 and 5.3 times (3 times on average) slower than (RAM) Mur$\varphi$ with enough RAM memory to complete the verification task at hand. Using our disk based Mur$\varphi$ we were able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 gigabytes of RAM using RAM based Mur$\varphi$. |
| Address |
|
| Corporate Author |
|
Thesis |
|
| Publisher |
Springer |
Place of Publication |
Portland, OR, USA |
Editor |
Aagaard, M.; O'Leary, J.W. |
| Language |
|
Summary Language |
|
Original Title |
|
| Series Editor |
|
Series Title |
Lecture Notes in Computer Science |
Abbreviated Series Title |
|
| Series Volume |
2517 |
Series Issue |
|
Edition |
|
| ISSN |
3-540-00116-6 |
ISBN |
|
Medium |
|
| Area |
|
Expedition |
|
Conference |
|
| Notes |
|
Approved |
yes |
| Call Number |
Sapienza @ mari @ fmcad02 |
Serial |
41 |
| Permanent link to this record |
| |
|
| |
| Author |
Gribaudo, Marco; Horváth, Andras; Bobbio, Andrea; Tronci, Enrico; Ciancamerla, Ester; Minichino, Michele |
| Title |
Model-Checking Based on Fluid Petri Nets for the Temperature Control System of the ICARO Co-generative Plant |
Type |
Conference Article |
| Year |
2002 |
Publication |
21st International Conference on Computer Safety, Reliability and Security (SAFECOMP) |
Abbreviated Journal |
|
| Volume |
|
Issue |
|
Pages |
273-283 |
| Keywords |
|
| Abstract |
The modeling and analysis of hybrid systems is a recent and challenging research area which is actually dominated by two main lines: a functional analysis based on the description of the system in terms of discrete state (hybrid) automata (whose goal is to ascertain for conformity and reachability properties), and a stochastic analysis (whose aim is to provide performance and dependability measures). This paper investigates a unifying view between formal methods and stochastic methods by proposing an analysis methodology of hybrid systems based on Fluid Petri Nets (FPN). It is shown that the same FPN model can be fed to a functional analyser for model checking as well as to a stochastic analyser for performance evaluation. We illustrate our approach and show its usefulness by applying it to a “real world†hybrid system: the temperature control system of a co-generative plant. |
| Address |
|
| Corporate Author |
|
Thesis |
|
| Publisher |
Springer |
Place of Publication |
Catania, Italy |
Editor |
Anderson, S.; Bologna, S.; Felici, M. |
| Language |
|
Summary Language |
|
Original Title |
|
| Series Editor |
|
Series Title |
Lecture Notes in Computer Science |
Abbreviated Series Title |
|
| Series Volume |
2434 |
Series Issue |
|
Edition |
|
| ISSN |
3-540-44157-3 |
ISBN |
|
Medium |
|
| Area |
|
Expedition |
|
Conference |
|
| Notes |
|
Approved |
yes |
| Call Number |
Sapienza @ mari @ safecomp02 |
Serial |
42 |
| Permanent link to this record |
| |
|
| |
| Author |
Dipoppa, G.; D'Alessandro, G.; Semprini, R.; Tronci, E. |
| Title |
Integrating Automatic Verification of Safety Requirements in Railway Interlocking System Design |
Type |
Conference Article |
| Year |
2001 |
Publication |
High Assurance Systems Engineering, 2001. Sixth IEEE International Symposium on |
Abbreviated Journal |
|
| Volume |
|
Issue |
|
Pages |
209-219 |
| Keywords |
|
| Abstract |
A railway interlocking system (RIS) is an embedded system (namely a supervisory control system) that ensures the safe, operation of the devices in a railway station. RIS is a safety critical system. We explore the possibility of integrating automatic formal verification methods in a given industry RIS design flow. The main obstructions to be overcome in our work are: selecting a formal verification tool that is efficient enough to solve the verification problems at hand; and devising a cost effective integration strategy for such tool. We were able to devise a successful integration strategy meeting the above constraints without requiring major modification in the pre-existent design flow nor retraining of personnel. We run verification experiments for a RIS designed for the Singapore Subway. The experiments show that the RIS design flow obtained from our integration strategy is able to automatically verify real life RIS designs. |
| Address |
|
| Corporate Author |
|
Thesis |
|
| Publisher |
IEEE Computer Society |
Place of Publication |
Albuquerque, NM, USA |
Editor |
|
| Language |
|
Summary Language |
|
Original Title |
|
| Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
| Series Volume |
|
Series Issue |
|
Edition |
|
| ISSN |
0-7695-1275-5 |
ISBN |
|
Medium |
|
| Area |
|
Expedition |
|
Conference |
|
| Notes |
|
Approved |
yes |
| Call Number |
Sapienza @ mari @ hase01 |
Serial |
45 |
| Permanent link to this record |
| |
|
| |
| Author |
Tronci, Enrico |
| Title |
Hardware Verification, Boolean Logic Programming, Boolean Functional Programming |
Type |
Conference Article |
| Year |
1995 |
Publication |
Tenth Annual IEEE Symposium on Logic in Computer Science (LICS) |
Abbreviated Journal |
|
| Volume |
|
Issue |
|
Pages |
408-418 |
| Keywords |
|
| Abstract |
One of the main obstacles to automatic verification of finite state systems (FSSs) is state explosion. In this respect automatic verification of an FSS M using model checking and binary decision diagrams (BDDs) has an intrinsic limitation: no automatic global optimization of the verification task is possible until a BDD representation for M is generated. This is because systems and specifications are defined using different languages. To perform global optimization before generating a BDD representation for M we propose to use the same language to define systems and specifications. We show that first order logic on a Boolean domain yields an efficient functional programming language that can be used to represent, specify and automatically verify FSSs, e.g. on a SUN Sparc Station 2 we were able to automatically verify a 64 bit commercial multiplier. |
| Address |
|
| Corporate Author |
|
Thesis |
|
| Publisher |
IEEE Computer Society |
Place of Publication |
San Diego, California |
Editor |
|
| Language |
|
Summary Language |
|
Original Title |
|
| Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
| Series Volume |
|
Series Issue |
|
Edition |
|
| ISSN |
|
ISBN |
|
Medium |
|
| Area |
|
Expedition |
|
Conference |
|
| Notes |
|
Approved |
yes |
| Call Number |
Sapienza @ mari @ lics95 |
Serial |
56 |
| Permanent link to this record |
| |
|
| |
| Author |
Piperno, Adolfo; Tronci, Enrico |
| Title |
Regular Systems of Equations in λ-calculus |
Type |
Conference Article |
| Year |
1989 |
Publication |
Ictcs |
Abbreviated Journal |
|
| Volume |
|
Issue |
|
Pages |
|
| Keywords |
|
| Abstract |
Many problems arising in equational theories like Lambda-calculus and Combinatory Logic can be expressed by combinatory equations or systems of equations. However, the solvability problem for an arbitrarily given class of systems is in general undecidable. In this paper we shall focus our attention on a decidable class of systems, which will be called regular systems, and we shall analyse some classical problems and well-known properties of Lambda-calculus that can be described and solved by means of regular systems. The significance of such class will be emphasized showing that for slight extensions of it the solvability problem turns out to be undecidable. |
| Address |
|
| Corporate Author |
|
Thesis |
|
| Publisher |
|
Place of Publication |
Mantova - Italy |
Editor |
|
| Language |
|
Summary Language |
|
Original Title |
|
| Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
| Series Volume |
|
Series Issue |
|
Edition |
|
| ISSN |
|
ISBN |
|
Medium |
|
| Area |
|
Expedition |
|
Conference |
|
| Notes |
|
Approved |
yes |
| Call Number |
Sapienza @ mari @ ictcs89 |
Serial |
61 |
| Permanent link to this record |
| |
|
| |
| Author |
Böhm, Corrado; Piperno, Adolfo; Tronci, Enrico |
| Title |
Solving Equations in λ-calculus |
Type |
Conference Article |
| Year |
1989 |
Publication |
Proc. of: Logic Colloquium 88 |
Abbreviated Journal |
|
| Volume |
|
Issue |
|
Pages |
|
| Keywords |
|
| Abstract |
|
| Address |
|
| Corporate Author |
|
Thesis |
|
| Publisher |
|
Place of Publication |
Padova - Italy |
Editor |
|
| Language |
|
Summary Language |
|
Original Title |
|
| Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
| Series Volume |
|
Series Issue |
|
Edition |
|
| ISSN |
|
ISBN |
|
Medium |
|
| Area |
|
Expedition |
|
Conference |
|
| Notes |
|
Approved |
yes |
| Call Number |
Sapienza @ mari @ logic-colloquium-88 |
Serial |
62 |
| Permanent link to this record |
| |
|
| |
| Author |
Böhm, Corrado; Tronci, Enrico |
| Title |
X-Separability and Left-Invertibility in lambda-calculus |
Type |
Conference Article |
| Year |
1987 |
Publication |
Symposium on Logic in Computer Science (LICS) |
Abbreviated Journal |
|
| Volume |
|
Issue |
|
Pages |
320-328 |
| Keywords |
|
| Abstract |
|
| Address |
|
| Corporate Author |
|
Thesis |
|
| Publisher |
IEEE Computer Society |
Place of Publication |
Ithaca, New York, USA |
Editor |
|
| Language |
|
Summary Language |
|
Original Title |
|
| Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
| Series Volume |
|
Series Issue |
|
Edition |
|
| ISSN |
|
ISBN |
|
Medium |
|
| Area |
|
Expedition |
|
Conference |
|
| Notes |
|
Approved |
yes |
| Call Number |
Sapienza @ mari @ lics87 |
Serial |
63 |
| Permanent link to this record |
| |
|
| |
| Author |
Böhm, Corrado; Tronci, Enrico |
| Title |
X-separability and left-invertibility in the λ-calculus (extended abstract, invited paper) |
Type |
Conference Article |
| Year |
1987 |
Publication |
Proceedings of: Temi e prospettive della Logica e della Filosofia della Scienza contemporanea |
Abbreviated Journal |
|
| Volume |
|
Issue |
|
Pages |
|
| Keywords |
|
| Abstract |
|
| Address |
|
| Corporate Author |
|
Thesis |
|
| Publisher |
|
Place of Publication |
Cesena - Italy |
Editor |
|
| Language |
|
Summary Language |
|
Original Title |
|
| Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
| Series Volume |
|
Series Issue |
|
Edition |
|
| ISSN |
|
ISBN |
|
Medium |
|
| Area |
|
Expedition |
|
Conference |
|
| Notes |
|
Approved |
yes |
| Call Number |
Sapienza @ mari @ cesena87 |
Serial |
64 |
| Permanent link to this record |
| |
|
| |
| Author |
Tronci, Enrico |
| Title |
On Computing Optimal Controllers for Finite State Systems |
Type |
Conference Article |
| Year |
1997 |
Publication |
CDC '97: Proceedings of the 36th IEEE International Conference on Decision and Control |
Abbreviated Journal |
|
| Volume |
|
Issue |
|
Pages |
|
| Keywords |
|
| Abstract |
|
| Address |
|
| Corporate Author |
|
Thesis |
|
| Publisher |
IEEE Computer Society |
Place of Publication |
Washington, DC, USA |
Editor |
|
| Language |
|
Summary Language |
|
Original Title |
|
| Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
| Series Volume |
|
Series Issue |
|
Edition |
|
| ISSN |
|
ISBN |
|
Medium |
|
| Area |
|
Expedition |
|
Conference |
|
| Notes |
|
Approved |
yes |
| Call Number |
Sapienza @ mari @ cdc97 |
Serial |
66 |
| Permanent link to this record |
