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	Author	Cesta, Amedeo; Finzi, Alberto; Fratini, Simone; Orlandini, Andrea; Tronci, Enrico
	Title	Verifying Flexible Timeline-based Plans			Type	Conference Article
	Year	2009	Publication	E-Proc. of ICAPS Workshop on Validation and Verification of Planning and Scheduling Systems	Abbreviated Journal
	Volume		Issue		Pages
	Keywords
	Abstract	The synthesis of flexible temporal plans has demonstrated wide applications possibilities in heterogeneous domains. We are currently studying the connection between plan generation and execution from the particular perspective of verifying a flexible plan before actual execution. This paper explores how a model-checking verification tool, based on UPPAAL-TIGA, is suitable for verifying flexible temporal plans. We first describe the formal model, the formalism, and the verification method. Furthermore we discuss our own approach and some preliminary empirical results using a real-world case study.
	Address
	Corporate Author				Thesis
	Publisher		Place of Publication		Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN		ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ Vvps09			Serial	23
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	Author	Campagnano, Edoardo; Ciancamerla, Ester; Minichino, Michele; Tronci, Enrico
	Title	Automatic Analysis of a Safety Critical Tele Control System			Type	Conference Article
	Year	2005	Publication	24th International Conference on: Computer Safety, Reliability, and Security (SAFECOMP)	Abbreviated Journal
	Volume		Issue		Pages	94-107
	Keywords
	Abstract	We show how the Mur$\varphi$ model checker can be used to automatically carry out safety analysis of a quite complex hybrid system tele-controlling vehicles traffic inside a safety critical transport infrastructure such as a long bridge or a tunnel. We present the Mur$\varphi$ model we developed towards this end as well as the experimental results we obtained by running the Mur$\varphi$ verifier on our model. Our experimental results show that the approach presented here can be used to verify safety of critical dimensioning parameters (e.g. bandwidth) of the telecommunication network embedded in a safety critical system.
	Address
	Corporate Author				Thesis
	Publisher	Springer	Place of Publication	Fredrikstad, Norway	Editor	Winther, R.; Gran, B. A.; Dahll, G.
	Language		Summary Language		Original Title
	Series Editor		Series Title	Lecture Notes in Computer Science	Abbreviated Series Title
	Series Volume	3688	Series Issue		Edition
	ISSN	3-540-29200-4	ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ safecomp05			Serial	32
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	Author	Lanotte, Ruggero; Maggiolo-Schettini, Andrea; Tini, Simone; Troina, Angelo; Tronci, Enrico
	Title	Automatic Covert Channel Analysis of a Multilevel Secure Component			Type	Conference Article
	Year	2004	Publication	Information and Communications Security, 6th International Conference, ICICS 2004, Malaga, Spain, October 27-29, 2004, Proceedings	Abbreviated Journal
	Volume		Issue		Pages	249-261
	Keywords
	Abstract	The NRL Pump protocol defines a multilevel secure component whose goal is to minimize leaks of information from high level systems to lower level systems, without degrading average time performances. We define a probabilistic model for the NRL Pump and show how a probabilistic model checker (FHP-mur$\varphi$) can be used to estimate the capacity of a probabilistic covert channel in the NRL Pump. We are able to compute the probability of a security violation as a function of time for various configurations of the system parameters (e.g. buffer sizes, moving average size, etc). Because of the model complexity, our results cannot be obtained using an analytical approach and, because of the low probabilities involved, it can be hard to obtain them using a simulator.
	Address
	Corporate Author				Thesis
	Publisher	Springer	Place of Publication		Editor	Lopez, J.; Qing, S.; Okamoto, E.
	Language		Summary Language		Original Title
	Series Editor		Series Title	Lecture Notes in Computer Science	Abbreviated Series Title
	Series Volume	3269	Series Issue		Edition
	ISSN		ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ icics04			Serial	34
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	Author	Martinelli, Marco; Tronci, Enrico; Dipoppa, Giovanni; Balducelli, Claudio
	Title	Electric Power System Anomaly Detection Using Neural Networks			Type	Conference Article
	Year	2004	Publication	8th International Conference on: Knowledge-Based Intelligent Information and Engineering Systems (KES)	Abbreviated Journal
	Volume		Issue		Pages	1242-1248
	Keywords
	Abstract	The aim of this work is to propose an approach to monitor and protect Electric Power System by learning normal system behaviour at substations level, and raising an alarm signal when an abnormal status is detected; the problem is addressed by the use of autoassociative neural networks, reading substation measures. Experimental results show that, through the proposed approach, neural networks can be used to learn parameters underlaying system behaviour, and their output processed to detecting anomalies due to hijacking of measures, changes in the power network topology (i.e. transmission lines breaking) and unexpected power demand trend.
	Address
	Corporate Author				Thesis
	Publisher	Springer	Place of Publication	Wellington, New Zealand	Editor	Negoita, M.G.; Howlett, R.J.; Jain, L.C.
	Language		Summary Language		Original Title
	Series Editor		Series Title	Lecture Notes in Computer Science	Abbreviated Series Title
	Series Volume	3213	Series Issue		Edition
	ISSN	3-540-23318-0	ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ kes04			Serial	35
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	Author	Ciancamerla, Ester; Minichino, Michele; Serro, Stefano; Tronci, Enrico
	Title	Automatic Timeliness Verification of a Public Mobile Network			Type	Conference Article
	Year	2003	Publication	22nd International Conference on Computer Safety, Reliability, and Security (SAFECOMP)	Abbreviated Journal
	Volume		Issue		Pages	35-48
	Keywords
	Abstract	This paper deals with the automatic verification of the timeliness of Public Mobile Network (PMN), consisting of Mobile Nodes (MNs) and Base Stations (BSs). We use the Mur$\varphi$ Model Checker to verify that the waiting access time of each MN, under different PMN configurations and loads, and different inter arrival times of MNs in a BS cell, is always below a preassigned threshold. Our experimental results show that Model Checking can be successfully used to generate worst case scenarios and nicely complements probabilistic methods and simulation which are typically used for performance evaluation.
	Address
	Corporate Author				Thesis
	Publisher	Springer	Place of Publication	Edinburgh, UK	Editor	Anderson, S.; Felici, M.; Littlewood, B.
	Language		Summary Language		Original Title
	Series Editor		Series Title	Lecture Notes in Computer Science	Abbreviated Series Title
	Series Volume	2788	Series Issue		Edition
	ISSN	978-3-540-20126-7	ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ safecomp03			Serial	38
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	Author	Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa
	Title	Exploiting Transition Locality in the Disk Based Mur$\varphi$ Verifier			Type	Conference Article
	Year	2002	Publication	4th International Conference on Formal Methods in Computer-Aided Design (FMCAD)	Abbreviated Journal
	Volume		Issue		Pages	202-219
	Keywords
	Abstract	The main obstruction to automatic verification of Finite State Systems is the huge amount of memory required to complete the verification task (state explosion). This motivates research on distributed as well as disk based verification algorithms. In this paper we present a disk based Breadth First Explicit State Space Exploration algorithm as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm exploits transition locality (i.e. the statistical fact that most transitions lead to unvisited states or to recently visited states) to decrease disk read accesses thus reducing the time overhead due to disk usage. A disk based verification algorithm for Mur$\varphi$ has been already proposed in the literature. To measure the time speed up due to locality exploitation we compared our algorithm with such previously proposed algorithm. Our experimental results show that our disk based verification algorithm is typically more than 10 times faster than such previously proposed disk based verification algorithm. To measure the time overhead due to disk usage we compared our algorithm with RAM based verification using the (standard) Mur$\varphi$ verifier with enough memory to complete the verification task. Our experimental results show that even when using 1/10 of the RAM needed to complete verification, our disk based algorithm is only between 1.4 and 5.3 times (3 times on average) slower than (RAM) Mur$\varphi$ with enough RAM memory to complete the verification task at hand. Using our disk based Mur$\varphi$ we were able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 gigabytes of RAM using RAM based Mur$\varphi$.
	Address
	Corporate Author				Thesis
	Publisher	Springer	Place of Publication	Portland, OR, USA	Editor	Aagaard, M.; O'Leary, J.W.
	Language		Summary Language		Original Title
	Series Editor		Series Title	Lecture Notes in Computer Science	Abbreviated Series Title
	Series Volume	2517	Series Issue		Edition
	ISSN	3-540-00116-6	ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ fmcad02			Serial	41
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	Author	Gribaudo, Marco; HorvÃ¡th, Andras; Bobbio, Andrea; Tronci, Enrico; Ciancamerla, Ester; Minichino, Michele
	Title	Model-Checking Based on Fluid Petri Nets for the Temperature Control System of the ICARO Co-generative Plant			Type	Conference Article
	Year	2002	Publication	21st International Conference on Computer Safety, Reliability and Security (SAFECOMP)	Abbreviated Journal
	Volume		Issue		Pages	273-283
	Keywords
	Abstract	The modeling and analysis of hybrid systems is a recent and challenging research area which is actually dominated by two main lines: a functional analysis based on the description of the system in terms of discrete state (hybrid) automata (whose goal is to ascertain for conformity and reachability properties), and a stochastic analysis (whose aim is to provide performance and dependability measures). This paper investigates a unifying view between formal methods and stochastic methods by proposing an analysis methodology of hybrid systems based on Fluid Petri Nets (FPN). It is shown that the same FPN model can be fed to a functional analyser for model checking as well as to a stochastic analyser for performance evaluation. We illustrate our approach and show its usefulness by applying it to a Ã¢â‚¬Å“real worldÃ¢â‚¬Â hybrid system: the temperature control system of a co-generative plant.
	Address
	Corporate Author				Thesis
	Publisher	Springer	Place of Publication	Catania, Italy	Editor	Anderson, S.; Bologna, S.; Felici, M.
	Language		Summary Language		Original Title
	Series Editor		Series Title	Lecture Notes in Computer Science	Abbreviated Series Title
	Series Volume	2434	Series Issue		Edition
	ISSN	3-540-44157-3	ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ safecomp02			Serial	42
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	Author	Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa
	Title	A Probabilistic Approach to Automatic Verification of Concurrent Systems			Type	Conference Article
	Year	2001	Publication	8th Asia-Pacific Software Engineering Conference (APSEC)	Abbreviated Journal
	Volume		Issue		Pages	317-324
	Keywords
	Abstract	The main barrier to automatic verification of concurrent systems is the huge amount of memory required to complete the verification task (state explosion). In this paper we present a probabilistic algorithm for automatic verification via model checking. Our algorithm trades space with time. In particular, when memory is full because of state explosion our algorithm does not give up verification. Instead it just proceeds at a lower speed and its results will only hold with some arbitrarily small error probability. Our preliminary experimental results show that by using our probabilistic algorithm we can typically save more than 30% of RAM with an average time penalty of about 100% w.r.t. a deterministic state space exploration with enough memory to complete the verification task. This is better than giving up the verification task because of lack of memory.
	Address
	Corporate Author				Thesis
	Publisher	IEEE Computer Society	Place of Publication	Macau, China	Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN	0-7695-1408-1	ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ apsec01			Serial	43
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	Author	Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa
	Title	Exploiting Transition Locality in Automatic Verification			Type	Conference Article
	Year	2001	Publication	11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME)	Abbreviated Journal
	Volume		Issue		Pages	259-274
	Keywords
	Abstract	In this paper we present an algorithm to contrast state explosion when using Explicit State Space Exploration to verify protocols. We show experimentally that protocols exhibit transition locality. We present a verification algorithm that exploits transition locality as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm is compatible with all Breadth First (BF) optimization techniques present in the Mur$\varphi$ verifier and it is by no means a substitute for any of them. In fact, since our algorithm trades space with time, it is typically most useful when one runs out of memory and has already used all other state reduction techniques present in the Mur$\varphi$ verifier. Our experimental results show that using our approach we can typically save more than 40% of RAM with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction.
	Address
	Corporate Author				Thesis
	Publisher	Springer	Place of Publication	Livingston, Scotland, UK	Editor	Margaria, T.; Melham, T.F.
	Language		Summary Language		Original Title
	Series Editor		Series Title	Lecture Notes in Computer Science	Abbreviated Series Title
	Series Volume	2144	Series Issue		Edition
	ISSN	3-540-42541-1	ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ charme01			Serial	44
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	Author	Dipoppa, G.; D'Alessandro, G.; Semprini, R.; Tronci, E.
	Title	Integrating Automatic Verification of Safety Requirements in Railway Interlocking System Design			Type	Conference Article
	Year	2001	Publication	High Assurance Systems Engineering, 2001. Sixth IEEE International Symposium on	Abbreviated Journal
	Volume		Issue		Pages	209-219
	Keywords
	Abstract	A railway interlocking system (RIS) is an embedded system (namely a supervisory control system) that ensures the safe, operation of the devices in a railway station. RIS is a safety critical system. We explore the possibility of integrating automatic formal verification methods in a given industry RIS design flow. The main obstructions to be overcome in our work are: selecting a formal verification tool that is efficient enough to solve the verification problems at hand; and devising a cost effective integration strategy for such tool. We were able to devise a successful integration strategy meeting the above constraints without requiring major modification in the pre-existent design flow nor retraining of personnel. We run verification experiments for a RIS designed for the Singapore Subway. The experiments show that the RIS design flow obtained from our integration strategy is able to automatically verify real life RIS designs.
	Address
	Corporate Author				Thesis
	Publisher	IEEE Computer Society	Place of Publication	Albuquerque, NM, USA	Editor
	Language		Summary Language		Original Title
	Series Editor		Series Title		Abbreviated Series Title
	Series Volume		Series Issue		Edition
	ISSN	0-7695-1275-5	ISBN		Medium
	Area		Expedition		Conference
	Notes				Approved	yes
	Call Number	Sapienza @ mari @ hase01			Serial	45
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