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Author |
Cecconi, Michele; Tronci, Enrico |
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Title |
Requirements Formalization and Validation for a Telecommunication Equipment Protection Switcher |
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Conference Article |
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Year  |
2000 |
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IEEE Computer Society |
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0-7695-0927-4 |
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yes |
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Call Number |
Sapienza @ mari @ CeTro00 |
Serial |
29 |
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Author |
Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa |
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Title |
A Probabilistic Approach to Automatic Verification of Concurrent Systems |
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Conference Article |
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Year |
2001 |
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8th Asia-Pacific Software Engineering Conference (APSEC) |
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317-324 |
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The main barrier to automatic verification of concurrent systems is the huge amount of memory required to complete the verification task (state explosion). In this paper we present a probabilistic algorithm for automatic verification via model checking. Our algorithm trades space with time. In particular, when memory is full because of state explosion our algorithm does not give up verification. Instead it just proceeds at a lower speed and its results will only hold with some arbitrarily small error probability. Our preliminary experimental results show that by using our probabilistic algorithm we can typically save more than 30% of RAM with an average time penalty of about 100% w.r.t. a deterministic state space exploration with enough memory to complete the verification task. This is better than giving up the verification task because of lack of memory. |
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IEEE Computer Society |
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Macau, China |
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0-7695-1408-1 |
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yes |
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Sapienza @ mari @ apsec01 |
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43 |
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Author |
Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa |
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Title |
Exploiting Transition Locality in Automatic Verification |
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Conference Article |
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Year |
2001 |
Publication |
11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) |
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259-274 |
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In this paper we present an algorithm to contrast state explosion when using Explicit State Space Exploration to verify protocols. We show experimentally that protocols exhibit transition locality. We present a verification algorithm that exploits transition locality as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm is compatible with all Breadth First (BF) optimization techniques present in the Mur$\varphi$ verifier and it is by no means a substitute for any of them. In fact, since our algorithm trades space with time, it is typically most useful when one runs out of memory and has already used all other state reduction techniques present in the Mur$\varphi$ verifier. Our experimental results show that using our approach we can typically save more than 40% of RAM with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction. |
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Springer |
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Livingston, Scotland, UK |
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Margaria, T.; Melham, T.F. |
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Lecture Notes in Computer Science |
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Series Volume |
2144 |
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3-540-42541-1 |
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yes |
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Call Number |
Sapienza @ mari @ charme01 |
Serial |
44 |
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Author |
Dipoppa, G.; D'Alessandro, G.; Semprini, R.; Tronci, E. |
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Title |
Integrating Automatic Verification of Safety Requirements in Railway Interlocking System Design |
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Conference Article |
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Year |
2001 |
Publication |
High Assurance Systems Engineering, 2001. Sixth IEEE International Symposium on |
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209-219 |
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A railway interlocking system (RIS) is an embedded system (namely a supervisory control system) that ensures the safe, operation of the devices in a railway station. RIS is a safety critical system. We explore the possibility of integrating automatic formal verification methods in a given industry RIS design flow. The main obstructions to be overcome in our work are: selecting a formal verification tool that is efficient enough to solve the verification problems at hand; and devising a cost effective integration strategy for such tool. We were able to devise a successful integration strategy meeting the above constraints without requiring major modification in the pre-existent design flow nor retraining of personnel. We run verification experiments for a RIS designed for the Singapore Subway. The experiments show that the RIS design flow obtained from our integration strategy is able to automatically verify real life RIS designs. |
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IEEE Computer Society |
Place of Publication |
Albuquerque, NM, USA |
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0-7695-1275-5 |
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yes |
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Call Number |
Sapienza @ mari @ hase01 |
Serial |
45 |
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Author |
Bobbio, Andrea; Bologna, Sandro; Minichino, Michele; Ciancamerla, Ester; Incalcaterra, Piero; Kropp, Corrado; Tronci, Enrico |
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Title |
Advanced techniques for safety analysis applied to the gas turbine control system of Icaro co generative plant |
Type |
Conference Article |
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Year |
2001 |
Publication |
X Convegno Tecnologie e Sistemi Energetici Complessi |
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339-350 |
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The paper describes two complementary and integrable approaches, a probabilistic one and a deterministic one, based on classic and advanced modelling techniques for safety analysis of complex computer based systems. The probabilistic approach is based on classical and innovative probabilistic analysis methods. The deterministic approach is based on formal verification methods. Such approaches are applied to the gas turbine control system of ICARO co generative plant, in operation at ENEA CR Casaccia. The main difference between the two approaches, behind the underlining different theories, is that the probabilistic one addresses the control system by itself, as the set of sensors, processing units and actuators, while the deterministic one also includes the behaviour of the equipment under control which interacts with the control system. The final aim of the research, documented in this paper, is to explore an innovative method which put the probabilistic and deterministic approaches in a strong relation to overcome the drawbacks of their isolated, selective and fragmented use which can lead to inconsistencies in the evaluation results. |
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Genova, Italy |
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yes |
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Call Number |
Sapienza @ mari @ tesec01 |
Serial |
65 |
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Author |
Intrigila, Benedetto; Salvo, Ivano; Sorgi, Stefano |
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Title |
A characterization of weakly Church-Rosser abstract reduction systems that are not Church-Rosser |
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Journal Article |
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Year |
2001 |
Publication |
Information and Computation |
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Volume |
171 |
Issue |
2 |
Pages |
137-155 |
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Abstract |
Basic properties of rewriting systems can be stated in the framework of abstract reduction systems (ARS). Properties like confluence (or Church-Rosser, CR) and weak confluence (or weak Church-Rosser, WCR) and their relationships can be studied in this setting: as a matter of fact, well-known counterexamples to the implication WCR CR have been formulated as ARS. In this paper, starting from the observation that such counterexamples are structurally similar, we set out a graph-theoretic characterization of WCR ARS that is not CR in terms of a suitable class of reduction graphs, such that in every WCR not CR ARS, we can embed at least one element of this class. Moreover, we give a tighter characterization for a restricted class of ARS enjoying a suitable regularity condition. Finally, as a consequence of our approach, we prove some interesting results about ARS using the mathematical tools developed. In particular, we prove an extension of the Newman’s lemma and we find out conditions that, once assumed together with WCR property, ensure the unique normal form property. The Appendix treats two interesting examples, both generated by graph-rewriting rules, with specific combinatorial properties. |
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Academic Press, Inc. |
Place of Publication |
Duluth, MN, USA |
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0890-5401 |
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yes |
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Call Number |
Sapienza @ mari @ Intrigila-Salvo-Sorgi:01 |
Serial |
68 |
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Author |
Bono, V.; Salvo, I. |
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Title |
A CuCh Interpretation of an Object-Oriented Language |
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Journal Article |
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Year |
2001 |
Publication |
Electronic Notes in Theoretical Computer Science |
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Volume |
50 |
Issue |
2 |
Pages |
159-177 |
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Abstract |
CuCh machine extends pure lambda–calculus with algebraic data types and provides a the possibility of defining functions over the disjoint sum of algebras. We exploit such natural form of overloading to define a functional interpretation of a simple, but significant fragment of a typical object-oriented language. |
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Elsevier |
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BOTH 2001, Bohm’s theorem: applications to Computer Science Theory (Satellite Workshop of ICALP 2001) |
Approved |
yes |
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Call Number |
Sapienza @ mari @ Bono-Salvo:BOTH01 |
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72 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Exploiting Transition Locality in the Disk Based Mur$\varphi$ Verifier |
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Conference Article |
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Year |
2002 |
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4th International Conference on Formal Methods in Computer-Aided Design (FMCAD) |
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202-219 |
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Abstract |
The main obstruction to automatic verification of Finite State Systems is the huge amount of memory required to complete the verification task (state explosion). This motivates research on distributed as well as disk based verification algorithms. In this paper we present a disk based Breadth First Explicit State Space Exploration algorithm as well as an implementation of it within the Mur$\varphi$ verifier. Our algorithm exploits transition locality (i.e. the statistical fact that most transitions lead to unvisited states or to recently visited states) to decrease disk read accesses thus reducing the time overhead due to disk usage. A disk based verification algorithm for Mur$\varphi$ has been already proposed in the literature. To measure the time speed up due to locality exploitation we compared our algorithm with such previously proposed algorithm. Our experimental results show that our disk based verification algorithm is typically more than 10 times faster than such previously proposed disk based verification algorithm. To measure the time overhead due to disk usage we compared our algorithm with RAM based verification using the (standard) Mur$\varphi$ verifier with enough memory to complete the verification task. Our experimental results show that even when using 1/10 of the RAM needed to complete verification, our disk based algorithm is only between 1.4 and 5.3 times (3 times on average) slower than (RAM) Mur$\varphi$ with enough RAM memory to complete the verification task at hand. Using our disk based Mur$\varphi$ we were able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 gigabytes of RAM using RAM based Mur$\varphi$. |
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Springer |
Place of Publication |
Portland, OR, USA |
Editor |
Aagaard, M.; O'Leary, J.W. |
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Lecture Notes in Computer Science |
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Series Volume |
2517 |
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ISSN |
3-540-00116-6 |
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yes |
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Call Number |
Sapienza @ mari @ fmcad02 |
Serial |
41 |
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Author |
Gribaudo, Marco; Horváth, Andras; Bobbio, Andrea; Tronci, Enrico; Ciancamerla, Ester; Minichino, Michele |
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Title |
Model-Checking Based on Fluid Petri Nets for the Temperature Control System of the ICARO Co-generative Plant |
Type |
Conference Article |
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Year |
2002 |
Publication |
21st International Conference on Computer Safety, Reliability and Security (SAFECOMP) |
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273-283 |
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The modeling and analysis of hybrid systems is a recent and challenging research area which is actually dominated by two main lines: a functional analysis based on the description of the system in terms of discrete state (hybrid) automata (whose goal is to ascertain for conformity and reachability properties), and a stochastic analysis (whose aim is to provide performance and dependability measures). This paper investigates a unifying view between formal methods and stochastic methods by proposing an analysis methodology of hybrid systems based on Fluid Petri Nets (FPN). It is shown that the same FPN model can be fed to a functional analyser for model checking as well as to a stochastic analyser for performance evaluation. We illustrate our approach and show its usefulness by applying it to a “real world†hybrid system: the temperature control system of a co-generative plant. |
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Springer |
Place of Publication |
Catania, Italy |
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Anderson, S.; Bologna, S.; Felici, M. |
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Lecture Notes in Computer Science |
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Series Volume |
2434 |
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ISSN |
3-540-44157-3 |
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Approved |
yes |
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Call Number |
Sapienza @ mari @ safecomp02 |
Serial |
42 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Synchronized Regular Expressions |
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Journal Article |
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Year |
2002 |
Publication |
Electr. Notes Theor. Comput. Sci. |
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62 |
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195-210 |
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Abstract |
Text manipulation is one of the most common tasks for everyone using a computer. The increasing number of textual information in electronic format that every computer user collects everyday stresses the need of more powerful tools to interact with texts. Indeed, much work has been done to provide nonprogramming tools that can be useful for the most common text manipulation issues. Regular Expressions (RE), introduced by Kleene, are well–known in the formal language theory. RE received several extensions, depending on the application of interest. In almost all the implementations of RE search algorithms (e.g. the egrep [A] UNIX command, or the Perl [17] language pattern matching constructs) we find backreferences (as defind in [1]), i.e. expressions that make reference to the string matched by a previous subexpression. Generally speaking, it seems that all the kinds of synchronizations between subexpressions in a RE can be very useful when interacting with texts. Therefore, we introduce the Synchronized Regular Expressions (SRE) as a derivation of the Regular Expressions. We use SRE to present a formal study of the already known backreferences extension, and of a new extension proposed by us, which we call the synchronized exponents. Moreover, since we are talking about formalisms that should have a practical utility and can be used in the real world, we have the problem of how to present SRE to the final users. Therefore, in this paper we also propose a user–friendly syntax for SRE to be used in implementations of SRE–powered search algorithms. |
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TOSCA 2001, Theory of Concurrency, Higher Order Languages and Types |
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yes |
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Call Number |
Sapienza @ mari @ entcs02 |
Serial |
46 |
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