PT Unknown
AU Mancini, T
   Mari, F
   Massini, A
   Melatti, I
   Tronci, E
TI System Level Formal Verification via Distributed Multi-Core Hardware in the Loop Simulation
SE Proc. of the 22nd  Euromicro International Conference on Parallel, Distributed and Network-Based Processing
PY 2014
DI 10.1109/PDP.2014.32
ER