PT Unknown
AU Mancini, T
   Mari, F
   Massini, A
   Melatti, I
   Tronci, E
TI Anytime System Level Verification via Random Exhaustive Hardware In The Loop Simulation
SE In Proceedings of 17th EuroMicro Conference on Digital System Design (DSD 2014)
PY 2014
DI 10.1109/DSD.2014.91
ER