PT Unknown
AU Tronci, E
TI Hardware Verification, Boolean Logic Programming, Boolean Functional Programming
SE Tenth Annual IEEE Symposium on Logic in Computer Science (LICS)
PY 1995
BP 408
EP 418
DI 10.1109/LICS.1995.523275
AB One of the main obstacles to automatic verification of finite state systems (FSSs) is state explosion. In this respect automatic verification of an FSS M using model checking and binary decision diagrams (BDDs) has an intrinsic limitation: no automatic global optimization of the verification task is possible until a BDD representation for M is generated. This is because systems and specifications are defined using different languages. To perform global optimization before generating a BDD representation for M we propose to use the same language to define systems and specifications. We show that first order logic on a Boolean domain yields an efficient functional programming language that can be used to represent, specify and automatically verify FSSs, e.g. on a SUN Sparc Station 2 we were able to automatically verify a 64 bit commercial multiplier.
PI San Diego, California
ER