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\bibitem{Mancini_etal2016} T. Mancini, F. Mari, A. Massini, I. Melatti, and E. Tronci. "Anytime system level verification via parallel random exhaustive hardware in the loop simulation." \textit{Microprocessors and Microsystems} 41 (2016): 12--28. ISSN: 0141-9331. DOI: 10.1016/j.micpro.2015.10.010.

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