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Author (up) Tronci, Enrico pdf  doi
  Title Hardware Verification, Boolean Logic Programming, Boolean Functional Programming Type Conference Article
  Year 1995 Publication Tenth Annual IEEE Symposium on Logic in Computer Science (LICS) Abbreviated Journal  
  Volume Issue Pages 408-418  
  Abstract One of the main obstacles to automatic verification of finite state systems (FSSs) is state explosion. In this respect automatic verification of an FSS M using model checking and binary decision diagrams (BDDs) has an intrinsic limitation: no automatic global optimization of the verification task is possible until a BDD representation for M is generated. This is because systems and specifications are defined using different languages. To perform global optimization before generating a BDD representation for M we propose to use the same language to define systems and specifications. We show that first order logic on a Boolean domain yields an efficient functional programming language that can be used to represent, specify and automatically verify FSSs, e.g. on a SUN Sparc Station 2 we were able to automatically verify a 64 bit commercial multiplier.  
  Corporate Author Thesis  
  Publisher IEEE Computer Society Place of Publication San Diego, California Editor  
  Language Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN ISBN Medium  
  Area Expedition Conference  
  Notes Approved yes  
  Call Number Sapienza @ mari @ lics95 Serial 56  
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