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Author |
Tronci, Enrico |
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Title |
Optimal Finite State Supervisory Control |
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Conference Article |
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1996 |
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CDC '96: Proceedings of the 35th IEEE International Conference on Decision and Control |
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Supervisory Controllers are Discrete Event Dynamic Systems (DEDSs) forming the discrete core of a Hybrid Control System. We address the problem of automatic synthesis of Optimal Finite State Supervisory Controllers (OSCs). We show that Boolean First Order Logic (BFOL) and Binary Decision Diagrams (BDDs) are an effective methodological and practical framework for Optimal Finite State Supervisory Control. Using BFOL programs (i.e. systems of boolean functional equations) and BDDs we give a symbolic (i.e. BDD based) algorithm for automatic synthesis of OSCs. Our OSC synthesis algorithm can handle arbitrary sets of final states as well as plant transition relations containing loops and uncontrollable events (e.g. failures). We report on experimental results on the use of our OSC synthesis algorithm to synthesize a C program implementing a minimum fuel OSC for two autonomous vehicles moving on a 4 x 4 grid. |
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IEEE Computer Society |
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Washington, DC, USA |
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yes |
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Call Number |
Sapienza @ mari @ cdc96 |
Serial |
67 |
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Author |
Intrigila, Benedetto; Magazzeni, Daniele; Melatti, Igor; Tronci, Enrico |
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Title |
A Model Checking Technique for the Verification of Fuzzy Control Systems |
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Conference Article |
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Year |
2005 |
Publication |
CIMCA '05: Proceedings of the International Conference on Computational Intelligence for Modelling, Control and Automation and International Conference on Intelligent Agents, Web Technologies and Internet Commerce Vol-1 (CIMCA-IAWTIC'06) |
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536-542 |
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Fuzzy control is well known as a powerful technique for designing and realizing control systems. However, statistical evidence for their correct behavior may be not enough, even when it is based on a large number of samplings. In order to provide a more systematic verification process, the cell-to-cell mapping technology has been used in a number of cases as a verification tool for fuzzy control systems and, more recently, to assess their optimality and robustness. However, cell-to-cell mapping is typically limited in the number of cells it can explore. To overcome this limitation, in this paper we show how model checking techniques may be instead used to verify the correct behavior of a fuzzy control system. To this end, we use a modified version of theMurphi verifier, which ease the modeling phase by allowing to use finite precision real numbers and external C functions. In this way, also already designed simulators may be used for the verification phase. With respect to the cell mapping technique, our approach appears to be complementary; indeed, it explores a much larger number of states, at the cost of being less informative on the global dynamic of the system. |
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IEEE Computer Society |
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Washington, DC, USA |
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0-7695-2504-0-01 |
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yes |
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Sapienza @ mari @ Immt05 |
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75 |
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Author |
Brizzolari, Francesco; Melatti, Igor; Tronci, Enrico; Della Penna, Giuseppe |
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Title |
Disk Based Software Verification via Bounded Model Checking |
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Conference Article |
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2007 |
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APSEC '07: Proceedings of the 14th Asia-Pacific Software Engineering Conference |
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358-365 |
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One of the most successful approach to automatic software verification is SAT based bounded model checking (BMC). One of the main factors limiting the size of programs that can be automatically verified via BMC is the huge number of clauses that the backend SAT solver has to process. In fact, because of this, the SAT solver may easily run out of RAM. We present two disk based algorithms that can considerably decrease the number of clauses that a BMC backend SAT solver has to process in RAM. Our experimental results show that using our disk based algorithms we can automatically verify programs that are out of reach for RAM based BMC. |
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IEEE Computer Society |
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Washington, DC, USA |
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0-7695-3057-5 |
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yes |
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Call Number |
Sapienza @ mari @ Bmtd07 |
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76 |
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Author |
Della Penna, Giuseppe; Magazzeni, Daniele; Tofani, Alberto; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico |
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Title |
Automated Generation of Optimal Controllers through Model Checking Techniques |
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Conference Article |
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Year |
2006 |
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Icinco-Icso |
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26-33 |
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We present a methodology for the synthesis of controllers, which exploits (explicit) model checking techniques. That is, we can cope with the systematic exploration of a very large state space. This methodology can be applied to systems where other approaches fail. In particular, we can consider systems with an highly non-linear dynamics and lacking a uniform mathematical description (model). We can also consider situations where the required control action cannot be specified as a local action, and rather a kind of planning is required. Our methodology individuates first a raw optimal controller, then extends it to obtain a more robust one. A case study is presented which considers the well known truck-trailer obstacle avoidance parking problem, in a parking lot with obstacles on it. The complex non-linear dynamics of the truck-trailer system, within the presence of obstacles, makes the parking problem extremely hard. We show how, by our methodology, we can obtain optimal controllers with different degrees of robustness. |
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INSTICC Press |
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Andrade-Cetto, J.; Ferrier, J.-L.; Pereira, J. M. C. D.; Filipe, J. |
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972-8865-59-7 |
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yes |
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Call Number |
Sapienza @ mari @ Dimmtt06 |
Serial |
79 |
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Author |
Melatti, Igor; Palmer, Robert; Sawaya, Geoffrey; Yang, Yu; Kirby, Robert Mike; Gopalakrishnan, Ganesh |
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Title |
Parallel and Distributed Model Checking in Eddy |
Type |
Conference Article |
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Year |
2006 |
Publication |
Model Checking Software, 13th International SPIN Workshop, Vienna, Austria, March 30 – April 1, 2006, Proceedings |
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Pages |
108-125 |
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Model checking of safety properties can be scaled up by pooling the CPU and memory resources of multiple computers. As compute clusters containing 100s of nodes, with each node realized using multi-core (e.g., 2) CPUs will be widespread, a model checker based on the parallel (shared memory) and distributed (message passing) paradigms will more efficiently use the hardware resources. Such a model checker can be designed by having each node employ two shared memory threads that run on the (typically) two CPUs of a node, with one thread responsible for state generation, and the other for efficient communication, including (i) performing overlapped asynchronous message passing, and (ii) aggregating the states to be sent into larger chunks in order to improve communication network utilization. We present the design details of such a novel model checking architecture called Eddy. We describe the design rationale, details of how the threads interact and yield control, exchange messages, as well as detect termination. We have realized an instance of this architecture for the Murphi modeling language. Called Eddy_Murphi, we report its performance over the number of nodes as well as communication parameters such as those controlling state aggregation. Nearly linear reduction of compute time with increasing number of nodes is observed. Our thread task partition is done in such a way that it is modular, easy to port across different modeling languages, and easy to tune across a variety of platforms. |
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Springer - Verlag |
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Valmari, A. |
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Lecture Notes in Computer Science |
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Series Volume |
3925 |
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ISSN |
0302-9743 |
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978-3-540-33102-5 |
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yes |
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Call Number |
Sapienza @ mari @ Mpsykg06 |
Serial |
81 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico |
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Title |
Exploiting Hub States in Automatic Verification |
Type |
Conference Article |
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Year |
2005 |
Publication |
Automated Technology for Verification and Analysis: Third International Symposium, ATVA 2005, Taipei, Taiwan, October 4-7, 2005, Proceedings |
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54-68 |
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In this paper we present a new algorithm to counteract state explosion when using Explicit State Space Exploration to verify protocol-like systems. We sketch the implementation of our algorithm within the Caching Mur$\varphi$ verifier and give experimental results showing its effectiveness. We show experimentally that, when memory is a scarce resource, our algorithm improves on the time performances of Caching Mur$\varphi$ verification algorithm, saving between 16% and 68% (45% on average) in computation time. |
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Springer |
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D.A. Peled; Y.-K. Tsay |
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Lecture Notes in Computer Science |
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Series Volume |
3707 |
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3-540-29209-8 |
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yes |
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Call Number |
Sapienza @ mari @ Dimt04 |
Serial |
83 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Finite Horizon Analysis of Markov Chains with the Mur$\varphi$ Verifier |
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Conference Article |
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Year |
2003 |
Publication |
Correct Hardware Design and Verification Methods, 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, 2003, Proceedings |
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394-409 |
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In this paper we present an explicit disk based verification algorithm for Probabilistic Systems defining discrete time/finite state Markov Chains. Given a Markov Chain and an integer k (horizon), our algorithm checks whether the probability of reaching an error state in at most k steps is below a given threshold. We present an implementation of our algorithm within a suitable extension of the Mur$\varphi$ verifier. We call the resulting probabilistic model checker FHP-Mur$\varphi$ (Finite Horizon Probabilistic Mur$\varphi$). We present experimental results comparing FHP-Mur$\varphi$ with (a finite horizon subset of) PRISM, a state-of-the-art symbolic model checker for Markov Chains. Our experimental results show that FHP-Mur$\varphi$ can handle systems that are out of reach for PRISM, namely those involving arithmetic operations on the state variables (e.g. hybrid systems). |
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Springer |
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Geist, D.; Tronci, E. |
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Lecture Notes in Computer Science |
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Series Volume |
2860 |
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3-540-20363-X |
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yes |
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Call Number |
Sapienza @ mari @ Dimtz03 |
Serial |
84 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Integrating RAM and Disk Based Verification within the Mur$\varphi$ Verifier |
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Conference Article |
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Year |
2003 |
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Correct Hardware Design and Verification Methods, 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, 2003, Proceedings |
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277-282 |
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We present a verification algorithm that can automatically switch from RAM based verification to disk based verification without discarding the work done during the RAM based verification phase. This avoids having to choose beforehand the proper verification algorithm. Our experimental results show that typically our integrated algorithm is as fast as (sometime faster than) the fastest of the two base (i.e. RAM based and disk based) verification algorithms. |
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Springer |
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Editor |
Geist, D.; Tronci, E. |
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Series Title |
Lecture Notes in Computer Science |
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Series Volume |
2860 |
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3-540-20363-X |
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yes |
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Call Number |
Sapienza @ mari @ DIMTZ03a |
Serial |
85 |
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Author |
Della Penna, Giuseppe; Di Marco, Antinisca; Intrigila, Benedetto; Melatti, Igor; Pierantonio, Alfonso |
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Title |
Xere: Towards a Natural Interoperability between XML and ER Diagrams |
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Conference Article |
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Year |
2003 |
Publication |
Fundamental Approaches to Software Engineering, 6th International Conference, FASE 2003, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2003, Warsaw, Poland, April 7-11, 2003, Proceedings |
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356-371 |
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XML (eXtensible Markup Language) is becoming the standard format for documents on Internet and is widely used to exchange data. Often, the relevant information contained in XML documents needs to be also stored in legacy databases (DB) in order to integrate the new data with the pre-existing ones. In this paper, we introduce a technique for the automatic XML-DB integration, which we call Xere. In particular we present, as the first step of Xere, the mapping algorithm which allows the translation of XML Schemas into Entity-Relationship diagrams. |
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Springer |
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Editor |
Pezzè, M. |
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Lecture Notes in Computer Science |
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Series Volume |
2621 |
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ISSN |
3-540-00899-3 |
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yes |
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Call Number |
Sapienza @ mari @ Ddimp03 |
Serial |
86 |
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Author |
Della Penna, Giuseppe; Magazzeni, Daniele; Tofani, Alberto; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico |
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Title |
Automatic Synthesis of Robust Numerical Controllers |
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Conference Article |
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Year |
2007 |
Publication |
Icas '07 |
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4 |
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A major problem of numerical controllers is their robustness, i.e. the state read from the plant may not be in the controller table, although it may be close to some states in the table. For continuous systems, this problem is typically handled by interpolation techniques. Unfortunately, when the plant contains both continuous and discrete variables, the interpolation approach does not work well. To cope with this kind of systems, we propose a general methodology that exploits explicit model checking in an innovative way to automatically synthesize a (time-) optimal numerical controller from a plant specification and apply an optimized strengthening algorithm only on the most significant states, in order to reach an acceptable robustness degree. We implemented all the algorithms within our CGMurphi tool, an extension of the well-known CMurphi verifier, and tested the effectiveness of our approach by applying it to the well-known truck and trailer obstacles avoidance problem. |
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IEEE Computer Society |
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0-7695-2859-5 |
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yes |
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Call Number |
Sapienza @ mari @ Dmtimt07 |
Serial |
89 |
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