| Records |
| Author |
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| Title |
Charme |
Type |
Conference Article |
| Year |
2003 |
Publication  |
Lecture Notes in Computer Science |
Abbreviated Journal |
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| Volume |
2860 |
Issue |
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Pages |
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| Keywords |
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| Abstract |
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| Address |
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| Corporate Author |
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Thesis |
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| Publisher |
Springer |
Place of Publication |
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Editor |
Geist, D.; Tronci, E. |
| Language |
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Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
3-540-20363-X |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ editor-charme03 |
Serial |
37 |
| Permanent link to this record |
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| Author |
Bucciarelli, Antonio; Piperno, Adolfo; Salvo, Ivano |
| Title |
Intersection types and λ-definability |
Type |
Journal Article |
| Year |
2003 |
Publication |
Mathematical Structures in Computer Science |
Abbreviated Journal |
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| Volume |
13 |
Issue |
1 |
Pages |
15-53 |
| Keywords |
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| Abstract |
This paper presents a novel method for comparing computational properties of λ-terms that are typeable with intersection types, with respect to terms that are typeable with Curry types. We introduce a translation from intersection typing derivations to Curry typeable terms that is preserved by β-reduction: this allows the simulation of a computation starting from a term typeable in the intersection discipline by means of a computation starting from a simply typeable term. Our approach proves strong normalisation for the intersection system naturally by means of purely syntactical techniques. The paper extends the results presented in Bucciarelli et al. (1999) to the whole intersection type system of Barendregt, Coppo and Dezani, thus providing a complete proof of the conjecture, proposed in Leivant (1990), that all functions uniformly definable using intersection types are already definable using Curry types. |
| Address |
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| Corporate Author |
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Thesis |
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| Publisher |
Cambridge University Press |
Place of Publication |
New York, NY, USA |
Editor |
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| Language |
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Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
0960-1295 |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ Bucciarelli-Piperno-Salvo:MSCS-03 |
Serial |
69 |
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| Author |
Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
| Title |
Anytime system level verification via parallel random exhaustive hardware in the loop simulation |
Type |
Journal Article |
| Year |
2016 |
Publication |
Microprocessors and Microsystems |
Abbreviated Journal |
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| Volume |
41 |
Issue |
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Pages |
12-28 |
| Keywords |
Model Checking of Hybrid Systems; Model checking driven simulation; Hardware in the loop simulation |
| Abstract |
Abstract System level verification of cyber-physical systems has the goal of verifying that the whole (i.e., software + hardware) system meets the given specifications. Model checkers for hybrid systems cannot handle system level verification of actual systems. Thus, Hardware In the Loop Simulation (HILS) is currently the main workhorse for system level verification. By using model checking driven exhaustive HILS, System Level Formal Verification (SLFV) can be effectively carried out for actual systems. We present a parallel random exhaustive HILS based model checker for hybrid systems that, by simulating all operational scenarios exactly once in a uniform random order, is able to provide, at any time during the verification process, an upper bound to the probability that the System Under Verification exhibits an error in a yet-to-be-simulated scenario (Omission Probability). We show effectiveness of the proposed approach by presenting experimental results on SLFV of the Inverted Pendulum on a Cart and the Fuel Control System examples in the Simulink distribution. To the best of our knowledge, no previously published model checker can exhaustively verify hybrid systems of such a size and provide at any time an upper bound to the Omission Probability. |
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Place of Publication |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
0141-9331 |
ISBN |
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Medium |
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Expedition |
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Conference |
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| Notes |
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Approved |
no |
| Call Number |
MCLab @ davi @ Mancini201612 |
Serial |
155 |
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| Author |
Mari, Federico; Melatti, Igor; Tronci, Enrico; Finzi, Alberto |
| Title |
A multi-hop advertising discovery and delivering protocol for multi administrative domain MANET |
Type |
Journal Article |
| Year |
2013 |
Publication |
Mobile Information Systems |
Abbreviated Journal |
Mobile Information Systems |
| Volume |
3 |
Issue |
9 |
Pages |
261-280 |
| Keywords |
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| Abstract |
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| Address |
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| Corporate Author |
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Thesis |
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| Publisher |
IOS Press |
Place of Publication |
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Editor |
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| Language |
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Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
1574-017x (Print) 1875-905X (Online) |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
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Approved |
no |
| Call Number |
Sapienza @ melatti @ |
Serial |
109 |
| Permanent link to this record |
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| Author |
Melatti, Igor; Palmer, Robert; Sawaya, Geoffrey; Yang, Yu; Kirby, Robert Mike; Gopalakrishnan, Ganesh |
| Title |
Parallel and Distributed Model Checking in Eddy |
Type |
Conference Article |
| Year |
2006 |
Publication |
Model Checking Software, 13th International SPIN Workshop, Vienna, Austria, March 30 – April 1, 2006, Proceedings |
Abbreviated Journal |
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| Volume |
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Issue |
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Pages |
108-125 |
| Keywords |
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| Abstract |
Model checking of safety properties can be scaled up by pooling the CPU and memory resources of multiple computers. As compute clusters containing 100s of nodes, with each node realized using multi-core (e.g., 2) CPUs will be widespread, a model checker based on the parallel (shared memory) and distributed (message passing) paradigms will more efficiently use the hardware resources. Such a model checker can be designed by having each node employ two shared memory threads that run on the (typically) two CPUs of a node, with one thread responsible for state generation, and the other for efficient communication, including (i) performing overlapped asynchronous message passing, and (ii) aggregating the states to be sent into larger chunks in order to improve communication network utilization. We present the design details of such a novel model checking architecture called Eddy. We describe the design rationale, details of how the threads interact and yield control, exchange messages, as well as detect termination. We have realized an instance of this architecture for the Murphi modeling language. Called Eddy_Murphi, we report its performance over the number of nodes as well as communication parameters such as those controlling state aggregation. Nearly linear reduction of compute time with increasing number of nodes is observed. Our thread task partition is done in such a way that it is modular, easy to port across different modeling languages, and easy to tune across a variety of platforms. |
| Address |
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| Corporate Author |
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Thesis |
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| Publisher |
Springer - Verlag |
Place of Publication |
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Editor |
Valmari, A. |
| Language |
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Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
Lecture Notes in Computer Science |
Abbreviated Series Title |
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| Series Volume |
3925 |
Series Issue |
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Edition |
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| ISSN |
0302-9743 |
ISBN |
978-3-540-33102-5 |
Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ Mpsykg06 |
Serial |
81 |
| Permanent link to this record |
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| Author |
Mancini, T.; Massini, A.; Tronci, E. |
| Title |
Parallelization of Cycle-Based Logic Simulation |
Type |
Journal Article |
| Year |
2017 |
Publication |
Parallel Processing Letters |
Abbreviated Journal |
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| Volume |
27 |
Issue |
02 |
Pages |
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Series Title |
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Series Issue |
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Edition |
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ISBN |
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Medium |
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Expedition |
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Conference |
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| Notes |
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Approved |
no |
| Call Number |
MCLab @ davi @ |
Serial |
166 |
| Permanent link to this record |
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| Author |
Tronci, Enrico |
| Title |
Automatic Synthesis of Controllers from Formal Specifications |
Type |
Conference Article |
| Year |
1998 |
Publication |
Proc of 2nd IEEE International Conference on Formal Engineering Methods (ICFEM) |
Abbreviated Journal |
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| Volume |
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Issue |
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Pages |
134-143 |
| Keywords |
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| Abstract |
Many safety critical reactive systems are indeed embedded control systems. Usually a control system can be partitioned into two main subsystems: a controller and a plant. Roughly speaking: the controller observes the state of the plant and sends commands (stimulus) to the plant to achieve predefined goals. We show that when the plant can be modeled as a deterministic finite state system (FSS) it is possible to effectively use formal methods to automatically synthesize the program implementing the controller from the plant model and the given formal specifications for the closed loop system (plant+controller). This guarantees that the controller program is correct by construction. To the best of our knowledge there is no previously published effective algorithm to extract executable code for the controller from closed loop formal specifications. We show practical usefulness of our techniques by giving experimental results on their use to synthesize C programs implementing optimal controllers (OCs) for plants with more than 109 states. |
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Place of Publication |
Brisbane, Queensland, Australia |
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Original Title |
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Conference |
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| Notes |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ icfem98 |
Serial |
52 |
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| Author |
Kuijpers, Ed; Carotenuto, Luigi; Malapert, Jean-Cristophe; Markov-Vetter, Daniela; Melatti, Igor; Orlandini, Andrea; Pinchuk, Ranni |
| Title |
Collaboration on ISS Experiment Data and Knowledge Representation |
Type |
Conference Article |
| Year |
2012 |
Publication |
Proc. of IAC 2012 |
Abbreviated Journal |
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| Volume |
D.5.11 |
Issue |
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Pages |
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| Notes |
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Approved |
yes |
| Call Number |
Sapienza @ melatti @ |
Serial |
107 |
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| Author |
Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
| Title |
A Map-Reduce Parallel Approach to Automatic Synthesis of Control Software |
Type |
Conference Article |
| Year |
2013 |
Publication |
Proc. of International SPIN Symposium on Model Checking of Software (SPIN 2013) |
Abbreviated Journal |
International SPIN Symposium on Model Checking of Software |
| Volume |
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Issue |
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Pages |
43-60 |
| Keywords |
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| Abstract |
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Thesis |
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| Publisher |
Springer - Verlag |
Place of Publication |
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Editor |
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Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
Lecture Notes in Computer Science |
Abbreviated Series Title |
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| Series Volume |
7976 |
Series Issue |
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Edition |
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| ISSN |
0302-9743 |
ISBN |
978-3-642-39175-0 |
Medium |
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Conference |
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no |
| Call Number |
Sapienza @ melatti @ |
Serial |
112 |
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| Author |
Mancini, Toni ; Mari, Federico ; Massini, Annalisa; Melatti, Igor; Tronci, Enrico |
| Title |
System Level Formal Verification via Distributed Multi-Core Hardware in the Loop Simulation |
Type |
Conference Article |
| Year |
2014 |
Publication |
Proc. of the 22nd Euromicro International Conference on Parallel, Distributed and Network-Based Processing |
Abbreviated Journal |
Euromicro International Conference on Parallel, Distributed and Network-Based Processing |
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Issue |
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Pages |
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| Publisher |
IEEE Computer Society |
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Approved |
no |
| Call Number |
Sapienza @ melatti @ |
Serial |
118 |
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