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Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico; Alvisi, Lorenzo; Clement, Allen; Li, Harry |
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Title |
Model Checking Coalition Nash Equilibria in MAD Distributed Systems |
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Conference Article |
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Year |
2009 |
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Stabilization, Safety, and Security of Distributed Systems, 11th International Symposium, SSS 2009, Lyon, France, November 3-6, 2009. Proceedings |
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531-546 |
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We present two OBDD based model checking algorithms for the verification of Nash equilibria in finite state mechanisms modeling Multiple Administrative Domains (MAD) distributed systems with possibly colluding agents (coalitions) and with possibly faulty or malicious nodes (Byzantine agents). Given a finite state mechanism, a proposed protocol for each agent and the maximum sizes f for Byzantine agents and q for agents collusions, our model checkers return Pass if the proposed protocol is an ε-f-q-Nash equilibrium, i.e. no coalition of size up to q may have an interest greater than ε in deviating from the proposed protocol when up to f Byzantine agents are present, Fail otherwise. We implemented our model checking algorithms within the NuSMV model checker: the first one explicitly checks equilibria for each coalition, while the second represents symbolically all coalitions. We present experimental results showing their effectiveness for moderate size mechanisms. For example, we can verify coalition Nash equilibria for mechanisms which corresponding normal form games would have more than $5 \times 10^21$ entries. Moreover, we compare the two approaches, and the explicit algorithm turns out to outperform the symbolic one. To the best of our knowledge, no model checking algorithm for verification of Nash equilibria of mechanisms with coalitions has been previously published. |
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Springer |
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Guerraoui, R.; Petit, F. |
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Lecture Notes in Computer Science |
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5873 |
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yes |
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Sapienza @ mari @ sss09 |
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19 |
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Author |
Tronci, Enrico |
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Introductory Paper |
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Journal Article |
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2006 |
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Sttt |
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8 |
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4-5 |
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355-358 |
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In today’s competitive market designing of digital systems (hardware as well as software) faces tremendous challenges. In fact, notwithstanding an ever decreasing project budget, time to market and product lifetime, designers are faced with an ever increasing system complexity and customer expected quality. The above situation calls for better and better formal verification techniques at all steps of the design flow. This special issue is devoted to publishing revised versions of contributions first presented at the 12th Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) held 21–24 October 2003 in L’Aquila, Italy. Authors of well regarded papers from CHARME’03 were invited to submit to this special issue. All papers included here have been suitably extended and have undergone an independent round of reviewing. |
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yes |
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Sapienza @ mari @ sttt06 |
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30 |
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Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Exploiting Transition Locality in Automatic Verification of Finite State Concurrent Systems |
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Journal Article |
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2004 |
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6 |
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4 |
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320-341 |
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In this paper we show that statistical properties of the transition graph of a system to be verified can be exploited to improve memory or time performances of verification algorithms. We show experimentally that protocols exhibit transition locality. That is, with respect to levels of a breadth-first state space exploration, state transitions tend to be between states belonging to close levels of the transition graph. We support our claim by measuring transition locality for the set of protocols included in the Mur$\varphi$ verifier distribution. We present a cache-based verification algorithm that exploits transition locality to decrease memory usage and a disk-based verification algorithm that exploits transition locality to decrease disk read accesses, thus reducing the time overhead due to disk usage. Both algorithms have been implemented within the Mur$\varphi$ verifier. Our experimental results show that our cache-based algorithm can typically save more than 40% of memory with an average time penalty of about 50% when using (Mur$\varphi$) bit compression and 100% when using bit compression and hash compaction, whereas our disk-based verification algorithm is typically more than ten times faster than a previously proposed disk-based verification algorithm and, even when using 10% of the memory needed to complete verification, it is only between 40 and 530% (300% on average) slower than (RAM) Mur$\varphi$ with enough memory to complete the verification task at hand. Using just 300 MB of memory our disk-based Mur$\varphi$ was able to complete verification of a protocol with about $10^9$ reachable states. This would require more than 5 GB of memory using standard Mur$\varphi$. |
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yes |
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Call Number |
Sapienza @ mari @ DIMTZ04j |
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91 |
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Author |
Böhm, Corrado; Tronci, Enrico |
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Title |
X-Separability and Left-Invertibility in lambda-calculus |
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Year |
1987 |
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Symposium on Logic in Computer Science (LICS) |
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320-328 |
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IEEE Computer Society |
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Ithaca, New York, USA |
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yes |
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Sapienza @ mari @ lics87 |
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63 |
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Tronci, Enrico |
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Title |
Hardware Verification, Boolean Logic Programming, Boolean Functional Programming |
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Conference Article |
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1995 |
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Tenth Annual IEEE Symposium on Logic in Computer Science (LICS) |
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408-418 |
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One of the main obstacles to automatic verification of finite state systems (FSSs) is state explosion. In this respect automatic verification of an FSS M using model checking and binary decision diagrams (BDDs) has an intrinsic limitation: no automatic global optimization of the verification task is possible until a BDD representation for M is generated. This is because systems and specifications are defined using different languages. To perform global optimization before generating a BDD representation for M we propose to use the same language to define systems and specifications. We show that first order logic on a Boolean domain yields an efficient functional programming language that can be used to represent, specify and automatically verify FSSs, e.g. on a SUN Sparc Station 2 we were able to automatically verify a 64 bit commercial multiplier. |
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IEEE Computer Society |
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San Diego, California |
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yes |
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Sapienza @ mari @ lics95 |
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56 |
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Cesta, Amedeo; Finzi, Alberto; Fratini, Simone; Orlandini, Andrea; Tronci, Enrico |
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Title |
Validation and verification issues in a timeline-based planning system |
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Journal Article |
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2010 |
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The Knowledge Engineering Review |
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25 |
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03 |
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299-318 |
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One of the key points to take into account to foster effective introduction of AI planning and scheduling systems in real world is to develop end user trust in the related technologies. Automated planning and scheduling systems often brings solutions to the users which are neither “obvious†nor immediately acceptable for them. This is due to the ability of these tools to take into account quite an amount of temporal and causal constraints and to employ resolution processes often designed to optimize the solution with respect to non trivial evaluation functions. To increase technology trust, the study of tools for verifying and validating plans and schedules produced by AI systems might be instrumental. In general, validation and verification techniques represent a needed complementary technology in developing domain independent architectures for automated problem solving. This paper presents a preliminary report of the issues concerned with the use of two software tools for formal verification of finite state systems to the validation of the solutions produced by MrSPOCK, a recent effort for building a timeline based planning tool in an ESA project. |
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Cambridge University Press |
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yes |
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Sapienza @ mari @ Cffot10 |
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18 |
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Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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Title |
Undecidability of Quantized State Feedback Control for Discrete Time Linear Hybrid Systems |
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2012 |
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Theoretical Aspects of Computing – ICTAC 2012 |
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243-258 |
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Springer Berlin Heidelberg |
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Roychoudhury, A.; D'Souza, M. |
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Lecture Notes in Computer Science |
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7521 |
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978-3-642-32942-5 |
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yes |
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Sapienza @ mari @ Mari2012 |
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99 |
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Author |
Tronci, Enrico |
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Title |
Equational Programming in Lambda-Calculus via SL-Systems. Part 1 |
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1996 |
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Theoretical Computer Science |
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160 |
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1&2 |
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145-184 |
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Sapienza @ mari @ tcs96 |
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54 |
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Tronci, Enrico |
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Title |
Equational Programming in Lambda-Calculus via SL-Systems. Part 2 |
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1996 |
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Theoretical Computer Science |
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160 |
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1&2 |
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185-216 |
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Sapienza @ mari @ tcs96a |
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55 |
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Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Finite Horizon Analysis of Stochastic Systems with the Mur$\varphi$ Verifier |
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Conference Article |
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2003 |
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Theoretical Computer Science, 8th Italian Conference, ICTCS 2003, Bertinoro, Italy, October 13-15, 2003, Proceedings |
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58-71 |
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Many reactive systems are actually Stochastic Processes. Automatic analysis of such systems is usually very difficult thus typically one simplifies the analysis task by using simulation or by working on a simplified model (e.g. a Markov Chain). We present a Finite Horizon Probabilistic Model Checking approach which essentially can handle the same class of stochastic processes of a typical simulator. This yields easy modeling of the system to be analyzed together with formal verification capabilities. Our approach is based on a suitable disk based extension of the Mur$\varphi$ verifier. Moreover we present experimental results showing effectiveness of our approach. |
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Springer |
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Blundo, C.; Laneve, C. |
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Lecture Notes in Computer Science |
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2841 |
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3-540-20216-1 |
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yes |
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Call Number |
Sapienza @ mari @ DIMTZ03c |
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90 |
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