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Author |
Gribaudo, Marco; Horváth, Andras; Bobbio, Andrea; Tronci, Enrico; Ciancamerla, Ester; Minichino, Michele |
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Title |
Fluid Petri Nets and hybrid model checking: a comparative case study |
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Journal Article |
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Year |
2003 |
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Int. Journal on: Reliability Engineering & System Safety |
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81 |
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3 |
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239-257 |
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The modeling and analysis of hybrid systems is a recent and challenging research area which is actually dominated by two main lines: a functional analysis based on the description of the system in terms of discrete state (hybrid) automata (whose goal is to ascertain conformity and reachability properties), and a stochastic analysis (whose aim is to provide performance and dependability measures). This paper investigates a unifying view between formal methods and stochastic methods by proposing an analysis methodology of hybrid systems based on Fluid Petri Nets (FPNs). FPNs can be analyzed directly using appropriate tools. Our paper shows that the same FPN model can be fed to different functional analyzers for model checking. In order to extensively explore the capability of the technique, we have converted the original FPN into languages for discrete as well as hybrid as well as stochastic model checkers. In this way, a first comparison among the modeling power of well known tools can be carried out. Our approach is illustrated by means of a ’real world’ hybrid system: the temperature control system of a co-generative plant. |
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Elsevier |
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Sapienza @ mari @ ress03 |
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40 |
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Author |
Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa |
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Title |
A Probabilistic Approach to Automatic Verification of Concurrent Systems |
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Conference Article |
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Year |
2001 |
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8th Asia-Pacific Software Engineering Conference (APSEC) |
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317-324 |
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The main barrier to automatic verification of concurrent systems is the huge amount of memory required to complete the verification task (state explosion). In this paper we present a probabilistic algorithm for automatic verification via model checking. Our algorithm trades space with time. In particular, when memory is full because of state explosion our algorithm does not give up verification. Instead it just proceeds at a lower speed and its results will only hold with some arbitrarily small error probability. Our preliminary experimental results show that by using our probabilistic algorithm we can typically save more than 30% of RAM with an average time penalty of about 100% w.r.t. a deterministic state space exploration with enough memory to complete the verification task. This is better than giving up the verification task because of lack of memory. |
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IEEE Computer Society |
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Macau, China |
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0-7695-1408-1 |
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yes |
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Sapienza @ mari @ apsec01 |
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43 |
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Dipoppa, G.; D'Alessandro, G.; Semprini, R.; Tronci, E. |
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Title |
Integrating Automatic Verification of Safety Requirements in Railway Interlocking System Design |
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Conference Article |
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2001 |
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High Assurance Systems Engineering, 2001. Sixth IEEE International Symposium on |
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209-219 |
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A railway interlocking system (RIS) is an embedded system (namely a supervisory control system) that ensures the safe, operation of the devices in a railway station. RIS is a safety critical system. We explore the possibility of integrating automatic formal verification methods in a given industry RIS design flow. The main obstructions to be overcome in our work are: selecting a formal verification tool that is efficient enough to solve the verification problems at hand; and devising a cost effective integration strategy for such tool. We were able to devise a successful integration strategy meeting the above constraints without requiring major modification in the pre-existent design flow nor retraining of personnel. We run verification experiments for a RIS designed for the Singapore Subway. The experiments show that the RIS design flow obtained from our integration strategy is able to automatically verify real life RIS designs. |
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IEEE Computer Society |
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Albuquerque, NM, USA |
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0-7695-1275-5 |
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yes |
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Call Number |
Sapienza @ mari @ hase01 |
Serial |
45 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Synchronized Regular Expressions |
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Journal Article |
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Year |
2002 |
Publication |
Electr. Notes Theor. Comput. Sci. |
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62 |
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Pages |
195-210 |
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Text manipulation is one of the most common tasks for everyone using a computer. The increasing number of textual information in electronic format that every computer user collects everyday stresses the need of more powerful tools to interact with texts. Indeed, much work has been done to provide nonprogramming tools that can be useful for the most common text manipulation issues. Regular Expressions (RE), introduced by Kleene, are well–known in the formal language theory. RE received several extensions, depending on the application of interest. In almost all the implementations of RE search algorithms (e.g. the egrep [A] UNIX command, or the Perl [17] language pattern matching constructs) we find backreferences (as defind in [1]), i.e. expressions that make reference to the string matched by a previous subexpression. Generally speaking, it seems that all the kinds of synchronizations between subexpressions in a RE can be very useful when interacting with texts. Therefore, we introduce the Synchronized Regular Expressions (SRE) as a derivation of the Regular Expressions. We use SRE to present a formal study of the already known backreferences extension, and of a new extension proposed by us, which we call the synchronized exponents. Moreover, since we are talking about formalisms that should have a practical utility and can be used in the real world, we have the problem of how to present SRE to the final users. Therefore, in this paper we also propose a user–friendly syntax for SRE to be used in implementations of SRE–powered search algorithms. |
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TOSCA 2001, Theory of Concurrency, Higher Order Languages and Types |
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yes |
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Call Number |
Sapienza @ mari @ entcs02 |
Serial |
46 |
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Author |
Focardi, Riccardo; Gorrieri, Roberto; Lanotte, Ruggero; Maggiolo-Schettini, Andrea; Martinelli, Fabio; Tini, Simone; Tronci, Enrico |
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Title |
Formal Models of Timing Attacks on Web Privacy |
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Journal Article |
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Year |
2002 |
Publication |
Electronic Notes in Theoretical Computer Science |
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62 |
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229-243 |
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We model a timing attack on web privacy proposed by Felten and Schneider by using three different approaches: HL-Timed Automata, SMV model checker, and tSPA Process Algebra. Some comparative analysis on the three approaches is derived. |
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TOSCA 2001, Theory of Concurrency, Higher Order Languages and Types |
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yes |
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Sapienza @ mari @ entcs02a |
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47 |
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Alimguzhin, V.; Mari, F.; Melatti, I.; Salvo, I.; Tronci, E. |
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Title |
Linearising Discrete Time Hybrid Systems |
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Journal Article |
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2017 |
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IEEE Transactions on Automatic Control |
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62 |
Issue |
10 |
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5357-5364 |
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Model Based Design approaches for embedded systems aim at generating correct-by-construction control software, guaranteeing that the closed loop system (controller and plant) meets given system level formal specifications. This technical note addresses control synthesis for safety and reachability properties of possibly non-linear discrete time hybrid systems. By means of syntactical transformations that require non-linear terms to be Lipschitz continuous functions, we over-approximate non-linear dynamics with a linear system whose controllers are guaranteed to be controllers of the original system. We evaluate performance of our approach on meaningful control synthesis benchmarks, also comparing it to a state-of-the-art tool. |
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0018-9286 |
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no |
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Sapienza @ mari @ ref7902199 |
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164 |
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Author |
Tronci, Enrico |
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Title |
Automatic Synthesis of Control Software for an Industrial Automation Control System |
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1999 |
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Proc.of: 14th IEEE International Conference on: Automated Software Engineering (ASE) |
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247-250 |
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We present a case study on automatic synthesis of control software from formal specifications for an industrial automation control system. Our aim is to compare the effectiveness (i.e. design effort and controller quality) of automatic controller synthesis from closed loop formal specifications with that of manual controller design, followed by automatic verification. Our experimental results show that for industrial automation control systems, automatic synthesis is a viable and profitable (especially as far as design effort is concerned) alternative to manual design, followed by automatic verification. |
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Cocoa Beach, Florida, USA |
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yes |
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Sapienza @ mari @ ase99 |
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49 |
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Author |
Tronci, Enrico |
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Title |
Formally Modeling a Metal Processing Plant and its Closed Loop Specifications |
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1999 |
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4th IEEE International Symposium on High-Assurance Systems Engineering (HASE) |
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151 |
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We present a case study on automatic synthesis of control software from formal specifications for an industrial automation control system. Our aim is to compare the effectiveness (i.e. design effort and controller quality) of automatic controller synthesis from closed loop formal specifications with that of manual controller design followed by automatic verification. The system to be controlled (plant) models a metal processing facility near Karlsruhe. We succeeded in automatically generating C code implementing a (correct by construction) embedded controller for such a plant from closed loop formal specifications. Our experimental results show that for industrial automation control systems automatic synthesis is a viable and profitable (especially as far as design effort is concerned) alternative to manual design followed by automatic verification. |
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IEEE Computer Society |
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Washington, D.C, USA |
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0-7695-0418-3 |
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yes |
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Sapienza @ mari @ hase99 |
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50 |
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Author |
Tronci, Enrico |
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Title |
Automatic Synthesis of Controllers from Formal Specifications |
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Conference Article |
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1998 |
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Proc of 2nd IEEE International Conference on Formal Engineering Methods (ICFEM) |
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134-143 |
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Many safety critical reactive systems are indeed embedded control systems. Usually a control system can be partitioned into two main subsystems: a controller and a plant. Roughly speaking: the controller observes the state of the plant and sends commands (stimulus) to the plant to achieve predefined goals. We show that when the plant can be modeled as a deterministic finite state system (FSS) it is possible to effectively use formal methods to automatically synthesize the program implementing the controller from the plant model and the given formal specifications for the closed loop system (plant+controller). This guarantees that the controller program is correct by construction. To the best of our knowledge there is no previously published effective algorithm to extract executable code for the controller from closed loop formal specifications. We show practical usefulness of our techniques by giving experimental results on their use to synthesize C programs implementing optimal controllers (OCs) for plants with more than 109 states. |
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Brisbane, Queensland, Australia |
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yes |
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Sapienza @ mari @ icfem98 |
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52 |
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Author |
Tronci, Enrico |
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Title |
Equational Programming in Lambda-Calculus via SL-Systems. Part 1 |
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1996 |
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Theoretical Computer Science |
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160 |
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1&2 |
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145-184 |
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yes |
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Sapienza @ mari @ tcs96 |
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54 |
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