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Author |
Tronci, Enrico |
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Title |
Automatic Synthesis of Controllers from Formal Specifications |
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Conference Article |
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Year |
1998 |
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Proc of 2nd IEEE International Conference on Formal Engineering Methods (ICFEM) |
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134-143 |
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Many safety critical reactive systems are indeed embedded control systems. Usually a control system can be partitioned into two main subsystems: a controller and a plant. Roughly speaking: the controller observes the state of the plant and sends commands (stimulus) to the plant to achieve predefined goals. We show that when the plant can be modeled as a deterministic finite state system (FSS) it is possible to effectively use formal methods to automatically synthesize the program implementing the controller from the plant model and the given formal specifications for the closed loop system (plant+controller). This guarantees that the controller program is correct by construction. To the best of our knowledge there is no previously published effective algorithm to extract executable code for the controller from closed loop formal specifications. We show practical usefulness of our techniques by giving experimental results on their use to synthesize C programs implementing optimal controllers (OCs) for plants with more than 109 states. |
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Brisbane, Queensland, Australia |
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yes |
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Call Number |
Sapienza @ mari @ icfem98 |
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52 |
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Author |
Cecconi, Michele; Tronci, Enrico |
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Title |
Requirements Formalization and Validation for a Telecommunication Equipment Protection Switcher |
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2000 |
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IEEE Computer Society |
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0-7695-0927-4 |
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yes |
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Call Number |
Sapienza @ mari @ CeTro00 |
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29 |
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Author |
Tronci, Enrico |
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Title |
Formally Modeling a Metal Processing Plant and its Closed Loop Specifications |
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Conference Article |
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Year |
1999 |
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4th IEEE International Symposium on High-Assurance Systems Engineering (HASE) |
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151 |
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We present a case study on automatic synthesis of control software from formal specifications for an industrial automation control system. Our aim is to compare the effectiveness (i.e. design effort and controller quality) of automatic controller synthesis from closed loop formal specifications with that of manual controller design followed by automatic verification. The system to be controlled (plant) models a metal processing facility near Karlsruhe. We succeeded in automatically generating C code implementing a (correct by construction) embedded controller for such a plant from closed loop formal specifications. Our experimental results show that for industrial automation control systems automatic synthesis is a viable and profitable (especially as far as design effort is concerned) alternative to manual design followed by automatic verification. |
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IEEE Computer Society |
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Washington, D.C, USA |
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0-7695-0418-3 |
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yes |
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Sapienza @ mari @ hase99 |
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50 |
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Author |
Tronci, Enrico |
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Title |
Automatic Synthesis of Control Software for an Industrial Automation Control System |
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Conference Article |
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1999 |
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Proc.of: 14th IEEE International Conference on: Automated Software Engineering (ASE) |
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247-250 |
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We present a case study on automatic synthesis of control software from formal specifications for an industrial automation control system. Our aim is to compare the effectiveness (i.e. design effort and controller quality) of automatic controller synthesis from closed loop formal specifications with that of manual controller design, followed by automatic verification. Our experimental results show that for industrial automation control systems, automatic synthesis is a viable and profitable (especially as far as design effort is concerned) alternative to manual design, followed by automatic verification. |
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Cocoa Beach, Florida, USA |
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yes |
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Sapienza @ mari @ ase99 |
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49 |
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Author |
Tronci, Enrico; Della Penna, Giuseppe; Intrigila, Benedetto; Venturini Zilli, Marisa |
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Title |
A Probabilistic Approach to Automatic Verification of Concurrent Systems |
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Conference Article |
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2001 |
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8th Asia-Pacific Software Engineering Conference (APSEC) |
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317-324 |
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The main barrier to automatic verification of concurrent systems is the huge amount of memory required to complete the verification task (state explosion). In this paper we present a probabilistic algorithm for automatic verification via model checking. Our algorithm trades space with time. In particular, when memory is full because of state explosion our algorithm does not give up verification. Instead it just proceeds at a lower speed and its results will only hold with some arbitrarily small error probability. Our preliminary experimental results show that by using our probabilistic algorithm we can typically save more than 30% of RAM with an average time penalty of about 100% w.r.t. a deterministic state space exploration with enough memory to complete the verification task. This is better than giving up the verification task because of lack of memory. |
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IEEE Computer Society |
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Macau, China |
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0-7695-1408-1 |
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yes |
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Sapienza @ mari @ apsec01 |
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43 |
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Author |
Bucciarelli, Antonio; Piperno, Adolfo; Salvo, Ivano |
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Title |
Intersection types and λ-definability |
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Journal Article |
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Year |
2003 |
Publication |
Mathematical Structures in Computer Science |
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13 |
Issue |
1 |
Pages |
15-53 |
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This paper presents a novel method for comparing computational properties of λ-terms that are typeable with intersection types, with respect to terms that are typeable with Curry types. We introduce a translation from intersection typing derivations to Curry typeable terms that is preserved by β-reduction: this allows the simulation of a computation starting from a term typeable in the intersection discipline by means of a computation starting from a simply typeable term. Our approach proves strong normalisation for the intersection system naturally by means of purely syntactical techniques. The paper extends the results presented in Bucciarelli et al. (1999) to the whole intersection type system of Barendregt, Coppo and Dezani, thus providing a complete proof of the conjecture, proposed in Leivant (1990), that all functions uniformly definable using intersection types are already definable using Curry types. |
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Cambridge University Press |
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New York, NY, USA |
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0960-1295 |
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yes |
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Sapienza @ mari @ Bucciarelli-Piperno-Salvo:MSCS-03 |
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69 |
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Author |
Coppo, Mario; Dezani-Ciancaglini, Mariangiola; Giovannetti, Elio; Salvo, Ivano |
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Title |
Mobility Types for Mobile Processes in Mobile Ambients |
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Journal Article |
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Year |
2003 |
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Electr. Notes Theor. Comput. Sci. |
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78 |
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We present an ambient-like calculus in which the open capability is dropped, and a new form of “lightweight†process mobility is introduced. The calculus comes equipped with a type system that allows the kind of values exchanged in communications and the access and mobility properties of processes to be controlled. A type inference procedure determines the “minimal†requirements to accept a system or a component as well typed. This gives a kind of principal typing. As an expressiveness test, we show that some well known calculi of concurrency and mobility can be encoded in our calculus in a natural way. |
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yes |
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Sapienza @ mari @ Coppo-Dezani-Giovannetti-Salvo:03 |
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74 |
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Focardi, Riccardo; Gorrieri, Roberto; Lanotte, Ruggero; Maggiolo-Schettini, Andrea; Martinelli, Fabio; Tini, Simone; Tronci, Enrico |
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Title |
Formal Models of Timing Attacks on Web Privacy |
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Journal Article |
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Year |
2002 |
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Electronic Notes in Theoretical Computer Science |
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62 |
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229-243 |
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We model a timing attack on web privacy proposed by Felten and Schneider by using three different approaches: HL-Timed Automata, SMV model checker, and tSPA Process Algebra. Some comparative analysis on the three approaches is derived. |
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TOSCA 2001, Theory of Concurrency, Higher Order Languages and Types |
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yes |
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Sapienza @ mari @ entcs02a |
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47 |
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Author |
Barbanera, Franco; Dezani-Ciancaglini, Mariangiola; Salvo, Ivano; Sassone, Vladimiro |
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Title |
A Type Inference Algorithm for Secure Ambients |
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Journal Article |
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2002 |
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Electronic Notes in Theoretical Computer Science |
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62 |
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83-101 |
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We consider a type discipline for the Ambient Calculus that associates ambients with security levels and constrains them to be traversed by or opened in ambients of higher security clearance only. We present a bottom-up algorithm that, given an untyped process P, computes a minimal set of constraints on security levels such that all actions during runs of P are performed without violating the security level priorities. Such an algorithm appears to be a prerequisite to use type systems to ensure security properties in the web scenario. |
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Elsevier |
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TOSCA 2001, Theory of Concurrency, Higher Order Languages and Types |
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yes |
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Sapienza @ mari @ Barbanera-Dezani-Salvo-Sassone:01 |
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73 |
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Author |
Lanotte, Ruggero; Maggiolo-Schettini, Andrea; Tini, Simone; Troina, Angelo; Tronci, Enrico |
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Title |
Automatic Analysis of the NRL Pump |
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Journal Article |
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Year |
2004 |
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Electr. Notes Theor. Comput. Sci. |
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99 |
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245-266 |
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We define a probabilistic model for the NRL Pump and using FHP-mur$\varphi$ show experimentally that there exists a probabilistic covert channel whose capacity depends on various NRL Pump parameters (e.g. buffer size, number of samples in the moving average, etc). |
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yes |
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Sapienza @ mari @ entcs04 |
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36 |
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