| Records |
| Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico; Alvisi, Lorenzo; Clement, Allen; Li, Harry |
| Title |
Model Checking Coalition Nash Equilibria in MAD Distributed Systems |
Type |
Conference Article |
Year  |
2009 |
Publication |
Stabilization, Safety, and Security of Distributed Systems, 11th International Symposium, SSS 2009, Lyon, France, November 3-6, 2009. Proceedings |
Abbreviated Journal |
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| Volume |
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Issue |
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Pages |
531-546 |
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| Abstract |
We present two OBDD based model checking algorithms for the verification of Nash equilibria in finite state mechanisms modeling Multiple Administrative Domains (MAD) distributed systems with possibly colluding agents (coalitions) and with possibly faulty or malicious nodes (Byzantine agents). Given a finite state mechanism, a proposed protocol for each agent and the maximum sizes f for Byzantine agents and q for agents collusions, our model checkers return Pass if the proposed protocol is an ε-f-q-Nash equilibrium, i.e. no coalition of size up to q may have an interest greater than ε in deviating from the proposed protocol when up to f Byzantine agents are present, Fail otherwise. We implemented our model checking algorithms within the NuSMV model checker: the first one explicitly checks equilibria for each coalition, while the second represents symbolically all coalitions. We present experimental results showing their effectiveness for moderate size mechanisms. For example, we can verify coalition Nash equilibria for mechanisms which corresponding normal form games would have more than $5 \times 10^21$ entries. Moreover, we compare the two approaches, and the explicit algorithm turns out to outperform the symbolic one. To the best of our knowledge, no model checking algorithm for verification of Nash equilibria of mechanisms with coalitions has been previously published. |
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Springer |
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Editor |
Guerraoui, R.; Petit, F. |
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Lecture Notes in Computer Science |
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| Series Volume |
5873 |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ sss09 |
Serial |
19 |
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| Author |
Mazzini, Silvia; Puri, Stefano; Mari, Federico; Melatti, Igor; Tronci, Enrico |
| Title |
Formal Verification at System Level |
Type |
Conference Article |
| Year |
2009 |
Publication |
In: DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. Instanbul, Turkey, EuroSpace |
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System Level Analysis calls for a language comprehensible to experts with different background and yet precise enough to support meaningful analyses. SysML is emerging as an effective balance between such conflicting goals. In this paper we outline some the results obtained as for SysML based system level functional formal verification by an ESA/ESTEC study, with a collaboration among INTECS and La Sapienza University of Roma. The study focuses on SysML based system level functional requirements techniques. |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ Dasia09 |
Serial |
20 |
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| Author |
Cesta, Amedeo; Finzi, Alberto; Fratini, Simone; Orlandini, Andrea; Tronci, Enrico |
| Title |
Flexible Timeline-Based Plan Verification |
Type |
Conference Article |
| Year |
2009 |
Publication |
KI 2009: Advances in Artificial Intelligence, 32nd Annual German Conference on AI, Paderborn, Germany, September 15-18, 2009. Proceedings |
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Issue |
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Pages |
49-56 |
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Springer |
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Mertsching, Bärbel; Hund, M.; Aziz, M.Z. |
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Lecture Notes in Computer Science |
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5803 |
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978-3-642-04616-2 |
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Approved |
yes |
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Sapienza @ mari @ Cffot09 |
Serial |
21 |
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| Author |
Cesta, Amedeo; Finzi, Alberto; Fratini, Simone; Orlandini, Andrea; Tronci, Enrico |
| Title |
Flexible Plan Verification: Feasibility Results |
Type |
Conference Article |
| Year |
2009 |
Publication |
16th RCRA International Workshop on “Experimental evaluation of algorithms for solving problems with combinatorial explosion” (RCRA). Proceedings |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ Rcra09 |
Serial |
22 |
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| Author |
Cesta, Amedeo; Finzi, Alberto; Fratini, Simone; Orlandini, Andrea; Tronci, Enrico |
| Title |
Verifying Flexible Timeline-based Plans |
Type |
Conference Article |
| Year |
2009 |
Publication |
E-Proc. of ICAPS Workshop on Validation and Verification of Planning and Scheduling Systems |
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| Abstract |
The synthesis of flexible temporal plans has demonstrated wide applications possibilities in heterogeneous domains. We are currently studying the connection between plan generation and execution from the particular perspective of verifying a flexible plan before actual execution. This paper explores how a model-checking verification tool, based on UPPAAL-TIGA, is suitable for verifying flexible temporal plans. We first describe the formal model, the formalism, and the verification method. Furthermore we discuss our own approach and some preliminary empirical results using a real-world case study. |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ Vvps09 |
Serial |
23 |
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| Author |
Melatti, Igor; Palmer, Robert; Sawaya, Geoffrey; Yang, Yu; Kirby, Robert Mike; Gopalakrishnan, Ganesh |
| Title |
Parallel and distributed model checking in Eddy |
Type |
Journal Article |
| Year |
2009 |
Publication |
Int. J. Softw. Tools Technol. Transf. |
Abbreviated Journal |
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| Volume |
11 |
Issue |
1 |
Pages |
13-25 |
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| Abstract |
Model checking of safety properties can be scaled up by pooling the CPU and memory resources of multiple computers. As compute clusters containing 100s of nodes, with each node realized using multi-core (e.g., 2) CPUs will be widespread, a model checker based on the parallel (shared memory) and distributed (message passing) paradigms will more efficiently use the hardware resources. Such a model checker can be designed by having each node employ two shared memory threads that run on the (typically) two CPUs of a node, with one thread responsible for state generation, and the other for efficient communication, including (1) performing overlapped asynchronous message passing, and (2) aggregating the states to be sent into larger chunks in order to improve communication network utilization. We present the design details of such a novel model checking architecture called Eddy. We describe the design rationale, details of how the threads interact and yield control, exchange messages, as well as detect termination. We have realized an instance of this architecture for the Murphi modeling language. Called Eddy_Murphi, we report its performance over the number of nodes as well as communication parameters such as those controlling state aggregation. Nearly linear reduction of compute time with increasing number of nodes is observed. Our thread task partition is done in such a way that it is modular, easy to port across different modeling languages, and easy to tune across a variety of platforms. |
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Springer-Verlag |
Place of Publication |
Berlin, Heidelberg |
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1433-2779 |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ Mpsykg09 |
Serial |
80 |
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| Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
| Title |
Synthesis of Quantized Feedback Control Software for Discrete Time Linear Hybrid Systems |
Type |
Conference Article |
| Year |
2010 |
Publication |
Computer Aided Verification |
Abbreviated Journal |
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Issue |
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Pages |
180-195 |
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| Abstract |
We present an algorithm that given a Discrete Time Linear Hybrid System returns a correct-by-construction software implementation K for a (near time optimal) robust quantized feedback controller for along with the set of states on which K is guaranteed to work correctly (controllable region). Furthermore, K has a Worst Case Execution Time linear in the number of bits of the quantization schema. |
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Springer Berlin / Heidelberg |
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Editor |
Touili, T.; Cook, B.; Jackson, P. |
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Lecture Notes in Computer Science |
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| Series Volume |
6174 |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ cav2010 |
Serial |
16 |
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| Author |
Cesta, Amedeo; Finzi, Alberto; Fratini, Simone; Orlandini, Andrea; Tronci, Enrico |
| Title |
Validation and verification issues in a timeline-based planning system |
Type |
Journal Article |
| Year |
2010 |
Publication |
The Knowledge Engineering Review |
Abbreviated Journal |
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| Volume |
25 |
Issue |
03 |
Pages |
299-318 |
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| Abstract |
One of the key points to take into account to foster effective introduction of AI planning and scheduling systems in real world is to develop end user trust in the related technologies. Automated planning and scheduling systems often brings solutions to the users which are neither “obvious†nor immediately acceptable for them. This is due to the ability of these tools to take into account quite an amount of temporal and causal constraints and to employ resolution processes often designed to optimize the solution with respect to non trivial evaluation functions. To increase technology trust, the study of tools for verifying and validating plans and schedules produced by AI systems might be instrumental. In general, validation and verification techniques represent a needed complementary technology in developing domain independent architectures for automated problem solving. This paper presents a preliminary report of the issues concerned with the use of two software tools for formal verification of finite state systems to the validation of the solutions produced by MrSPOCK, a recent effort for building a timeline based planning tool in an ESA project. |
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Cambridge University Press |
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Approved |
yes |
| Call Number |
Sapienza @ mari @ Cffot10 |
Serial |
18 |
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| Author |
Cavaliere, Federico; Mari, Federico; Melatti, Igor; Minei, Giovanni; Salvo, Ivano; Tronci, Enrico; Verzino, Giovanni; Yushtein, Yuri |
| Title |
Model Checking Satellite Operational Procedures |
Type |
Conference Article |
| Year |
2011 |
Publication |
DAta Systems In Aerospace (DASIA), Org. EuroSpace, Canadian Space Agency, CNES, ESA, EUMETSAT. San Anton, Malta, EuroSpace. |
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We present a model checking approach for the automatic verification of satellite operational procedures (OPs). Building a model for a complex system as a satellite is a hard task. We overcome this obstruction by using a suitable simulator (SIMSAT) for the satellite. Our approach aims at improving OP quality assurance by automatic exhaustive exploration of all possible simulation scenarios. Moreover, our solution decreases OP verification costs by using a model checker (CMurphi) to automatically drive the simulator. We model OPs as user-executed programs observing the simulator telemetries and sending telecommands to the simulator. In order to assess feasibility of our approach we present experimental results on a simple meaningful scenario. Our results show that we can save up to 90% of verification time. |
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Approved |
yes |
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Sapienza @ mari @ Dasia11 |
Serial |
13 |
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| Author |
Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
| Title |
From Boolean Relations to Control Software |
Type |
Conference Article |
| Year |
2011 |
Publication |
Proceedings of ICSEA 2011, The Sixth International Conference on Software Engineering Advances |
Abbreviated Journal |
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Issue |
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Pages |
528-533 |
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| Abstract |
Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F(x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a WCET (Worst Case Execution Time) linear in nr, being n = |x| the number of input arguments for functions in F and r the number of functions in F. |
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ThinkMind |
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978-1-61208-165-6 |
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Best Paper Award |
Approved |
yes |
| Call Number |
Sapienza @ mari @ icsea11 |
Serial |
14 |
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