A HW/SW Unified Approach for Embedded Systems Monitoring


Giacomo Valente, Luigi Pomante, Vittoriano Muttillo and Marco Faccio

Presentation title

A HW/SW Unified Approach for Embedded Systems Monitoring

Authors

Giacomo Valente, Luigi Pomante, Vittoriano Muttillo and Marco Faccio

Institution(s)

Università degli Studi dell'Aquila, Italy

Presentation type

Technical presentation

Abstract

Nowadays, the apparently endless demand for more impressive digital electronic systems drives the need to satisfy even more challenging requirements. In particular, when focusing on the embedded systems domain, the simultaneous optimization of many design metrics, such as execution time, area occupation, and energy consumption, has always been the most relevant goal. This has led to the adoption of complex on-chip architectures, possibly heterogeneous and/or parallel, called Systems-on-a-Chip (SoCs). In fact, SoCs are often exploited to face the previously highlighted issues since they provide higher performances per footprint: such a potential significant reduction in size, power dissipation, and unit cost, drives new products development. Also, the possible presence of reconfigurable logics into SoC allows to better face also the new challenges raised by the run-time adaptivity. Increased integration makes possible SoCs and all their benefits but, at the same time, it brings new development challenges. These new challenges have effects on different development activities: HW/SW and SW/SW Partitioning, Programming, Debugging, Optimization and Management. Some of the approaches used to face these new challenges have often a common denominator: to exploit a monitoring (sub)system. Monitoring systems can act either on the host computer (e.g., during a simulation a monitoring system can collect information about the simulated system) or on the target. The first case refers to On-Host Monitoring Systems (OHMSs), while the second to On-Target Monitoring Systems (OTMSs). Dealing with OTMSs implies to face with a certain impact on the target. This can be represented by some amount of intrusiveness in the functional behaviour, and/or some amount of overheads on non-functional characteristics (such as response time) of the system. Moreover, at the current state-of-art, OTMSs are mainly considered at the last steps of the design flow (i.e., at lower levels of abstraction), in particular during the HW and SW synthesis through techniques such as code instrumentation, hardware performance counters, etc. Unfortunately, such an approach drives to non-optimal solutions that can be avoided only by considering OTMSs, and their impact, since the initial steps of the design flow. In such a context, this presentation focuses on HW/SW co-design methodologies able to consider the integration of OTMSs into (possibly heterogeneous and/or parallel) SoCs. In more detail, a methodology, called MONICA (on-chip MONItoring system ChAracterization), is presented. MONICA acts by starting from monitorability requirements (MONs, i.e. requirements related to the capability to observe the behaviour of a system with the goal of collecting metrics like, e.g., power dissipation) and, by considering them since the initial steps of the design flow, it suggests OTMSs able to satisfy that MONs while respecting other non-functional requirements.


Additional material

  • Presentation slides: [pdf]