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Author |
Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
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Title |
On Checking Equivalence of Simulation Scripts |
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Journal Article |
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Year |
2021 |
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Journal of Logical and Algebraic Methods in Programming |
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100640 |
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Formal verification, Simulation based formal verification, Formal Verification of cyber-physical systems, System-level formal verification |
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Abstract |
To support Model Based Design of Cyber-Physical Systems (CPSs) many simulation based approaches to System Level Formal Verification (SLFV) have been devised. Basically, these are Bounded Model Checking approaches (since simulation horizon is of course bounded) relying on simulators to compute the system dynamics and thereby verify the given system properties. The main obstacle to simulation based SLFV is the large number of simulation scenarios to be considered and thus the huge amount of simulation time needed to complete the verification task. To save on computation time, simulation based SLFV approaches exploit the capability of simulators to save and restore simulation states. Essentially, such a time saving is obtained by optimising the simulation script defining the simulation activity needed to carry out the verification task. Although such approaches aim to (bounded) formal verification, as a matter of fact, the proof of correctness of the methods to optimise simulation scripts basically relies on an intuitive semantics for simulation scripting languages. This hampers the possibility of formally showing that the optimisations introduced to speed up the simulation activity do not actually omit checking of relevant behaviours for the system under verification. The aim of this paper is to fill the above gap by presenting an operational semantics for simulation scripting languages and by proving soundness and completeness properties for it. This, in turn, enables formal proofs of equivalence between unoptimised and optimised simulation scripts. |
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2352-2208 |
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MCLab @ davi @ Mancini2021100640 |
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183 |
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Mancini, T. ; Mari, F.; Massini, A.; Melatti, I.; Salvo, I.; Tronci, E. |
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Title |
On minimising the maximum expected verification time |
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2017 |
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Information Processing Letters |
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Sapienza @ mari @ |
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163 |
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Lanotte, Ruggero; Maggiolo-Schettini, Andrea; Tini, Simone; Troina, Angelo; Tronci, Enrico |
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Title |
Automatic Analysis of the NRL Pump |
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Journal Article |
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2004 |
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Electr. Notes Theor. Comput. Sci. |
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99 |
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245-266 |
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We define a probabilistic model for the NRL Pump and using FHP-mur$\varphi$ show experimentally that there exists a probabilistic covert channel whose capacity depends on various NRL Pump parameters (e.g. buffer size, number of samples in the moving average, etc). |
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yes |
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Sapienza @ mari @ entcs04 |
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36 |
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Della Penna, Giuseppe; Intrigila, Benedetto; Magazzeni, Daniele; Melatti, Igor; Tronci, Enrico |
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CGMurphi: Automatic synthesis of numerical controllers for nonlinear hybrid systems |
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2013 |
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European Journal of Control |
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European Journal of Control |
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19 |
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1 |
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14-36 |
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Elsevier North-Holland, Inc. |
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0947-3580 |
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Sapienza @ melatti @ |
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114 |
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Böhm, Corrado; Tronci, Enrico |
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About Systems of Equations, X-Separability, and Left-Invertibility in the lambda-Calculus |
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1991 |
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Inf. Comput. |
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90 |
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1 |
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1-32 |
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yes |
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Sapienza @ mari @ infcomp91 |
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59 |
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Tronci, Enrico |
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Title |
Equational Programming in Lambda-Calculus via SL-Systems. Part 2 |
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1996 |
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Theoretical Computer Science |
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160 |
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1&2 |
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185-216 |
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yes |
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Call Number |
Sapienza @ mari @ tcs96a |
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55 |
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Tronci, Enrico |
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Title |
Equational Programming in Lambda-Calculus via SL-Systems. Part 1 |
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1996 |
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Theoretical Computer Science |
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160 |
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1&2 |
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145-184 |
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yes |
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Sapienza @ mari @ tcs96 |
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54 |
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Author |
Gorrieri, Roberto; Lanotte, Ruggero; Maggiolo-Schettini, Andrea; Martinelli, Fabio; Tini, Simone; Tronci, Enrico |
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Title |
Automated analysis of timed security: a case study on web privacy |
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Journal Article |
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2004 |
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International Journal of Information Security |
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2 |
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3-4 |
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168-186 |
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This paper presents a case study on an automated analysis of real-time security models. The case study on a web system (originally proposed by Felten and Schneider) is presented that shows a timing attack on the privacy of browser users. Three different approaches are followed: LH-Timed Automata (analyzed using the model checker HyTech), finite-state automata (analyzed using the model checker NuSMV), and process algebras (analyzed using the model checker CWB-NC). A comparative analysis of these three approaches is given. |
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yes |
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Sapienza @ mari @ ijis04 |
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33 |
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Author |
Della Penna, Giuseppe; Intrigila, Benedetto; Melatti, Igor; Tronci, Enrico; Venturini Zilli, Marisa |
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Title |
Finite horizon analysis of Markov Chains with the Mur$\varphi$ verifier |
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2006 |
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Int. J. Softw. Tools Technol. Transf. |
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8 |
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4 |
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397-409 |
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In this paper we present an explicit disk-based verification algorithm for Probabilistic Systems defining discrete time/finite state Markov Chains. Given a Markov Chain and an integer k (horizon), our algorithm checks whether the probability of reaching an error state in at most k steps is below a given threshold. We present an implementation of our algorithm within a suitable extension of the Mur$\varphi$ verifier. We call the resulting probabilistic model checker FHP-Mur$\varphi$ (Finite Horizon Probabilistic Mur$\varphi$). We present experimental results comparing FHP-Mur$\varphi$ with (a finite horizon subset of) PRISM, a state-of-the-art symbolic model checker for Markov Chains. Our experimental results show that FHP-Mur$\varphi$ can handle systems that are out of reach for PRISM, namely those involving arithmetic operations on the state variables (e.g. hybrid systems). |
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Springer-Verlag |
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Berlin, Heidelberg |
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1433-2779 |
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yes |
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Sapienza @ mari @ Dimtz06 |
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78 |
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Author |
Tronci, Enrico |
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Title |
Introductory Paper |
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2006 |
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Sttt |
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8 |
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4-5 |
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355-358 |
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In today’s competitive market designing of digital systems (hardware as well as software) faces tremendous challenges. In fact, notwithstanding an ever decreasing project budget, time to market and product lifetime, designers are faced with an ever increasing system complexity and customer expected quality. The above situation calls for better and better formal verification techniques at all steps of the design flow. This special issue is devoted to publishing revised versions of contributions first presented at the 12th Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME) held 21–24 October 2003 in L’Aquila, Italy. Authors of well regarded papers from CHARME’03 were invited to submit to this special issue. All papers included here have been suitably extended and have undergone an independent round of reviewing. |
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yes |
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Call Number |
Sapienza @ mari @ sttt06 |
Serial |
30 |
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